Take the situation with gfxoff, the optimization may cause
corrupt CE ram contents. In addition emit_cntxcntl callback
has similar optimization which firmware can handle properly
even for power feature.
Signed-off-by: Jiansong Chen
Change-Id: I962946557108bb0575f8b2afc25b18a6dcf0d838
The optimization is safe for old GPUs and can help performance.
Signed-off-by: Jiansong Chen
Change-Id: Id3b1250f1fe46dddbe8498894fb97e9753b7cafe
---
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 6 ++
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 6 ++
2 files changed, 12 insertions(+)
diff --git
1. eliminate potential array index out of bounds.
2. return meaningful value for failure.
Signed-off-by: Jiansong Chen
Change-Id: I9be36eb2e42ee46cd00464b0f2c35a4e4ea213e3
---
.../gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c| 69 ++-
1 file changed, 35 insertions(+), 34 deletions
1. eliminate potential array index out of bounds.
2. return meaningful value for failure.
Signed-off-by: Jiansong Chen
Change-Id: I9be36eb2e42ee46cd00464b0f2c35a4e4ea213e3
---
.../gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c| 42 ++-
1 file changed, 23 insertions(+), 19 deletions
It should be DCLK1->PPCLK_DCLK_1 and VCLK->PPCLK_VCLK_0.
Signed-off-by: Jiansong Chen
Change-Id: Ib2239b35840d3774a0e1aa3114d2f965e6d88e7c
---
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pow
It's in accordance with pmfw 65.3.0 for navy_flounder.
Signed-off-by: Jiansong Chen
Change-Id: I97b0a28e280c3ac5c63f9c17a47c08b2c9b7d65e
---
drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerpla
To accommodate VCN instances variance, otherwise it may trigger
smu response error for configuration with less instances.
Signed-off-by: Jiansong Chen
Change-Id: I0bfe31f1f5638d539ac6ded3bffee8f57574bafa
---
.../drm/amd/powerplay/sienna_cichlid_ppt.c| 68 +++
1 file changed
It's in accordance with pmfw 65.5.0 for navy_flounder.
Signed-off-by: Jiansong Chen
Change-Id: I984a1147030264adbc02230e2e1dd416d4ad63b0
---
drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerpla
Update GC golden setting for navy_flounder.
Signed-off-by: Jiansong Chen
Change-Id: Ia7e82616b0be48f397c73b015823ac10ef907f08
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu
Enable GFXOFF for navy_flounder.
Signed-off-by: Jiansong Chen
Change-Id: Ia49c1ad70e3521447b9db101f5c0eae70b1df665
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c| 1 +
drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu
gfxoff is temporarily disabled for navy_flounder,
since at present the feature has broken some basic
amdgpu test.
Signed-off-by: Jiansong Chen
Change-Id: Icc030370997a66fb9f01cdd4b1c45816e3c88584
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a
This reverts commit 6a72ad7e387c6fec821c230fda3460f79fc0f877.
Newly released sdma fw (51.52) provides a fix for the issue.
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0
It's in accordance with pmfw 65.7.0 for navy_flounder.
Signed-off-by: Jiansong Chen
Change-Id: Iaac4c591f92c9a00891a29757d142c0109dcd676
---
drivers/gpu/drm/amd/pm/inc/smu_v11_0.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_0
dimgrey_cavefish has similar gc_10_3 ip with sienna_cichlid,
so follow its registers offset setting.
Signed-off-by: Jiansong Chen
Change-Id: I2c8f1022c0b4c5baf70d09ec99b7b2ca8da36bba
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
Update GC golden setting for navy_flounder.
Signed-off-by: Jiansong Chen
Change-Id: I25d5afb46ef9667a65bc897dcddf54390891e90f
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu
It's in accordance with pmfw 65.18.0 for navy_flounder.
Signed-off-by: Jiansong Chen
Change-Id: Ia96b6bf276f4a99a931a1203e3314a2ff407e924
---
drivers/gpu/drm/amd/pm/inc/smu_v11_0.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_0
Correct pipe offset calculation in is_pipe_enabled function,
it should be done in queues.
Signed-off-by: Jiansong Chen
Change-Id: I826aa532ca1e5073e3329212a8096f8f5a0be057
---
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
Same as sienna_cichlid, dimgrey_cavefish and navy_flounder
reuse sdma0 fw for other instances, so free it only once.
Signed-off-by: Jiansong Chen
Change-Id: I9dda4a9b73e20243ee48f54d8f0c7593d7e7354b
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion
For sdma5.2, all sdma instances will share the same fw,
remove unnecessary asic check to be more generic.
Signed-off-by: Jiansong Chen
Change-Id: I8b67dd588de9e7d54618404092a77b768bf0ddbd
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 31 +-
1 file changed, 5 insertions
Enable gpu recovery for navy_flounder by default to trigger
reset once needed.
Signed-off-by: Jiansong Chen
Change-Id: If213b4c7a5444872ec51869da53a374bf40db7fe
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu
It's in accordance with pmfw 65.22.0 for navy_flounder.
Signed-off-by: Jiansong Chen
Change-Id: I85fcf7a238b5a7d1da76709ef7963140702048ab
---
drivers/gpu/drm/amd/pm/inc/smu_v11_0.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_0
Under onevf mode the smu support to other chips is not well
verified yet.
Change-Id: Idbc166bea203cabba7615a255541eb283f18e1a0
Signed-off-by: Jiansong Chen
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd
DC BTC support for sienna_cichlid is added, it provides
the DC tolerance and aging measurements.
Signed-off-by: Jiansong Chen
Change-Id: I93b439b99c1bf365194d61385eb0fe0251f27041
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 7 +++
1 file changed, 7 insertions(+)
diff --git
When deciding whether to set pg for vcn1, instances
number is more generic than chip name.
Signed-off-by: Jiansong Chen
Change-Id: I5bf3f024ac499c347e3ea72563ae75e4a540f321
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions
1. enable ENABLE_CGTS_LEGACY to fix specviewperf11 random hang.
2. remove obsolete RLC_CGTT_SCLK_OVERRIDE workaround.
Signed-off-by: Jiansong Chen
Change-Id: Id52d45ba48159c5e1c9ecf658c5b52f7fc72eb65
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 6 ++
1 file changed, 2 insertions(+), 4
Switch default gpu reset method to MODE1 for navy_flounder.
Signed-off-by: Jiansong Chen
Change-Id: I99b2d3ac04352142e288877f3b6c3138d0efd4bc
---
drivers/gpu/drm/amd/amdgpu/nv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
Disable runtime pm for navy_flounder temporarily.
Signed-off-by: Jiansong Chen
Change-Id: Ie1b03f09ab70e79b6dd67ede5547afa23c063eee
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd
Enable MP0 clock DPM for sienna_cichlid.
Signed-off-by: Jiansong Chen
Change-Id: Iee6a05a634c200f9bbb895b963365bb001a451bc
---
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11
It's in accordance with pmfw 65.8.0 for navy_flounder.
Signed-off-by: Jiansong Chen
Change-Id: Iddb07c2123c0fd5dedff68f9a3a2f43685600117
---
drivers/gpu/drm/amd/pm/inc/smu_v11_0.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_0
This avoids smu issue when enabling runtime pptable update for
sienna_cichlid and so on. Runtime pptable udpate is needed for test
and debug purpose.
Signed-off-by: Jiansong Chen
Change-Id: I70b704ab4d6efd169f579c392e5dbc2737dc1fb2
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 12
The information provided via MODULE_FIRMWARE appears in
the module information. External tools(eg. dracut) may use the
list of fw files to include them as appropriate in an initramfs,
thus missing declaration will lead to request firmware failure
in boot time.
Signed-off-by: Jiansong Chen
Change
Remove gpu_info fw support for sienna_cichlid etc., since the
information can be retrieved from discovery binary.
Signed-off-by: Jiansong Chen
Change-Id: I4cb42aae5d680f28209122bb37962a2291ef785f
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 10 ++
1 file changed, 2 insertions(+), 8
gfxoff is temporarily disabled for navy_flounder, since
at present the feature caused some tdr when performing
display operation.
Signed-off-by: Jiansong Chen
Change-Id: Ib2be4041f82a3f5e12c657541c516815c8eb3670
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 3 +++
1 file changed, 3 insertions
This reverts commit 7e59138e97574e8dbecd1f259581277fff555d00.
TDR issue has been resovled by pmfw update.
Change-Id: Ia04709c4ba13835abfdec56558738bf6fbfac20d
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/dr
Drop navy_flounder hardcode of using soft pptable, so that it
can use pptable from vbios when available.
Signed-off-by: Jiansong Chen
Change-Id: I33436b023d03ae77a1b92da5a8062e8466e80110
---
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 1 -
1 file changed, 1 deletion(-)
diff --git a
Toggle on/off gfxoff during video playback to fix
gpu hang.
Signed-off-by: Jiansong Chen
Change-Id: I5b938c446884268c2cda0801121a53da980e603a
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu
Toggle on/off gfxoff during video playback to fix gpu hang.
v2: change sequence to be more compatible with original code.
Signed-off-by: Jiansong Chen
Change-Id: I5b938c446884268c2cda0801121a53da980e603a
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 5 -
1 file changed, 4 insertions(+), 1
Toggle on/off gfxoff during video playback to fix gpu hang.
v2: change sequence to be more compatible with original code.
Signed-off-by: Jiansong Chen
Change-Id: I5b938c446884268c2cda0801121a53da980e603a
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 5 -
1 file changed, 4 insertions(+), 1
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