Re: [PATCH] drm/amdkfd: Extend gfx12 trap handler fix to gfx10/11

2024-06-07 Thread Lancelot SIX
te TRAPSTS.{SAVECTX,HOST_TRAP} when restoring this register. Both of these fields can assert while the wavefront is running the trap handler. Signed-off-by: Jay Cornwall Cc: Lancelot Six Hi Jay, Thanks, that looks good to me (tested on gfx10.3, 11 and 12). For gfx11+ there might be a risk of

Re: [PATCH v2] drm/amdkfd: Handle deallocated VPGRs in gfx11+ trap handler

2024-05-29 Thread Lancelot SIX
-next, but I guess we just have a different bases. Signed-off-by: Jay Cornwall Cc: Lancelot Six --- .../gpu/drm/amd/amdkfd/cwsr_trap_handler.h| 695 +- .../amd/amdkfd/cwsr_trap_handler_gfx10.asm| 17 + 2 files changed, 366 insertions(+), 346 deletions(-) diff --git

Re: [PATCH 3/3] drm/amdkfd: gfx12 context save/restore trap handler fixes

2024-05-23 Thread Lancelot SIX
On 23/05/2024 20:31, Jay Cornwall wrote: On 5/23/2024 13:37, Lancelot SIX wrote: @@ -622,8 +638,15 @@ L_SAVE_HWREG:   #if ASIC_FAMILY >= CHIP_GFX12   // Ensure no further changes to barrier or LDS state. +    // STATE_PRIV.BARRIER_COMPLETE may change up to this po

Re: [PATCH 2/3] drm/amdkfd: Replace deprecated gfx12 trap handler instructions

2024-05-23 Thread Lancelot SIX
On 23/05/2024 15:08, Jay Cornwall wrote: Newer assemblers reject S_WAITCNT. All instances of S_WAITCNT can be replaced by S_WAITCNT 0 (< gfx12) or S_WAIT_IDLE (>= gfx12) since there is no concurrency of different memory instruction classes. Signed-off-by: Jay Cornwall Cc: Lancel

Re: [PATCH 1/3] drm/amdkfd: Sync trap handler binary with source

2024-05-23 Thread Lancelot SIX
On 23/05/2024 15:08, Jay Cornwall wrote: Source and binary have become mismatched during branch activity. Signed-off-by: Jay Cornwall Cc: Lancelot Six Thanks for doing this. This matches what I have when rebuilding the trap handlers. Reviewed-by: Lancelot Six --- .../gpu/drm/amd

Re: [PATCH 3/3] drm/amdkfd: gfx12 context save/restore trap handler fixes

2024-05-23 Thread Lancelot SIX
cause this field to assert if they complete the barrier. Do not overwrite EXCP_FLAG_PRIV.{SAVE_CONTEXT,HOST_TRAP} when restoring this register. Both of these fields can assert while the wavefront is running the trap handler. Signed-off-by: Jay Cornwall Cc: Lancelot Six --- .../gpu/drm/amd/

[PATCH] drm/amdkfd: update buffer_{store, load}_* modifiers for gfx940

2024-04-29 Thread Lancelot SIX
gfx940 assembler. This patch updates the cwsr_trap_handler_gfx9.s source file to be compatible with all gfx9 variants of the ISA. The binary assembled code is unchanged (so the behaviour is unchanged as well), only the source representation is updated. Signed-off-by: Lancelot SIX --- .../drm

[PATCH] drm/amdkfd: Flush the process wq before creating a kfd_process

2024-04-26 Thread Lancelot SIX
by kfd_process_wq_release. This patch proposes to avoid this race by making sure to drain kfd_process_wq before creating a new kfd_process object. This way, we know that any cleanup task is done executing when we reach kobject_init_and_add. Signed-off-by: Lancelot SIX --- drivers/gpu/drm/amd/amdkfd

[PATCH] drm/amdkfd: Enable SQ watchpoint for gfx10

2024-04-12 Thread Lancelot SIX
*_BIT_GFX10) as this reflects what both TCP and SQ watchpoints can do and both watchpoints are configured together. Signed-off-by: Lancelot SIX --- .../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c| 71 +++ 1 file changed, 58 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/amd

Re: [PATCH] drm/amdkfd: Clear the VALU exception state in the trap handler

2023-11-09 Thread Lancelot SIX
The trap handler could be entered with pending VALU exceptions, so clear the exception state before issuing vector instructions. Signed-off-by: Laurent Morichetti Reviewed-by: Jay Cornwall Hi, FYI, I tested this and it fixes the issue. Best, Lancelot. Tested-by: Lancelot Six