[PATCH 3/3] drm/amdgpu: Update the impelmentation of AMDGPU_PTE_MTYPE_VG10

This patch changes the implementation of AMDGPU_PTE_MTYPE_VG10, clear the bits before setting the new one. Suggested-by: Alex Deucher Signed-off-by: longlyao Signed-off-by: Shane Xiao --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 3 +-- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 7

[PATCH 2/3] drm/amdgpu: Update the impelmentation of AMDGPU_PTE_MTYPE_NV10

This patch changes the implementation of AMDGPU_PTE_MTYPE_NV10, clear the bits before setting the new one. Suggested-by: Alex Deucher Signed-off-by: longlyao Signed-off-by: Shane Xiao --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 7 +-- drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 17

[PATCH 1/3] drm/amdgpu: Update the impelmentation of AMDGPU_PTE_MTYPE_GFX12

-by: longlyao Signed-off-by: Shane Xiao --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 7 +-- drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 19 +-- 2 files changed, 14 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu

[PATCH] drm/amdgpu: Update the impelmentation of AMDGPU_PTE_MTYPE_GFX12

This patch changes the implementation of AMDGPU_PTE_MTYPE_GFX12, clear the bits before setting the new one. This fixed the potential issue that GFX12 setting memory to NC. v2: Clear mtype field before setting the new one (Alex) Signed-off-by: longlyao Signed-off-by: Shane Xiao --- drivers/gpu

[PATCH] drm/amdkfd: Correct the GFX12 memory type setting

This patch fixes the GFX12 memory type to NC. Since the Memory type can be overwritten by the previous operations, the GFX12 MTYPE bits need to be clear before setting to NC. Signed-off-by: longlyao Signed-off-by: Shane Xiao --- drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c | 3 ++- 1 file changed, 2

[PATCH] drm/amdgpu: Enable doorbell selfring after resize FB BAR

that GPU ring its own doorbell when this device is in translated mode when iommu is on. v2: Remove *_enable_doorbell_aperture functions (Christian) v3: Add comments to note that why we need enable doorbell selfring late (Christian) Signed-off-by: Shane Xiao Signed-off-by: Aaron Liu Tested

[PATCH] drm/amdgpu: Enable doorbell selfring after resize FB BAR

that GPU ring its own doorbell when this device is in translated mode when iommu is on. v2: 1. Remove *_enable_doorbell_aperture functions Signed-off-by: Shane Xiao Signed-off-by: Aaron Liu Tested-by: Xiaomeng Hou --- drivers/gpu/drm/amd/amdgpu/nv.c| 17 +++-- drivers/gpu/drm

[PATCH] drm/amdgpu: Enable doorbell selfring if resize BAR successfully

that GPU ring its own doorbell when this device is in translated mode with iommu is on. Signed-off-by: Shane Xiao Signed-off-by: Aaron Liu Tested-by: Xiaomeng Hou --- drivers/gpu/drm/amd/amdgpu/nv.c| 4 +++- drivers/gpu/drm/amd/amdgpu/soc15.c | 4 +++- drivers/gpu/drm/amd/amdgpu/soc21.c | 4

[PATCH 1/3] drm/amdgpu: Add userptr bo support for mGPUs when iommu is on

to these GPUs. However, we should explicit check whether RAM can direct map to all these GPUs. This patch fixes a potential issue that where RAM is direct mapped on some but not all GPUs. v2: 1. Update comment 2. Add helper function reuse_dmamap Signed-off-by: Shane Xiao --- .../gpu/drm/amd

[PATCH 3/3] drm/amdgpu: DROP redundant drm_prime_sg_to_dma_addr_array

For DMA-MAP userptr on other GPUs, the dma address array will be populated in amdgpu_ttm_backend_bind. Remove the redundant call from the driver. v2: update the comment Signed-off-by: Shane Xiao Reviewed-by: Felix Kuehling --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 3 --- 1

[PATCH 2/3] amd/amdgpu: Inherit coherence flags base on original BO flags

For SG BO to DMA-map userptrs on other GPUs, the SG BO need inherit MTYPEs in PTEs from original BO. If we set the flags, the device can be coherent with the CPUs and other GPUs. v2: 1. Drop unnecessary flags check 2. Remove local variable align Signed-off-by: Shane Xiao --- drivers/gpu

[PATCH 3/3] drm/amdgpu: DROP redundant drm_prime_sg_to_dma_addr_array

For DMA-MAP userptr on other GPUs, the dma address array has been populated in amdgpu_ttm_backend_bind. Remove the redundant call from the driver. Signed-off-by: Shane Xiao --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu

[PATCH 2/3] amd/amdgpu: Inherit coherence flags base on original BO flags

For SG BO to DMA-map userptrs on other GPUs, the SG BO need inherit MTYPEs in PTEs from original BO. If we set the flags, the device can be coherent with the CPUs and other GPUs. Signed-off-by: Shane Xiao --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 10 +- 1 file changed, 9

[PATCH 1/3] drm/amdgpu: Add userptr bo support for mGPUs when iommu is on

For userptr bo with iommu on, multiple GPUs use same system memory dma mapping address when both bo_adev and adev in identity mode or in the same iommu group. Signed-off-by: Shane Xiao --- drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 8 1 file changed, 4 insertions(+), 4

[PATCH] drm/amdgpu: remove TOPDOWN flags when allocating VRAM in large bar system

Since VRAM manager is changed from drm mm to drm buddy, the TOP_DOWN flag should not be set by default in the large bar system. Removing this flag helps improve drm buddy allactor efficiency and reduce the risk of splitting higher order block into lower order. Signed-off-by: Shane Xiao

[PATCH] drm/amd/amdgpu: solve the issue of allocate continuous pages under xen dom0

SIZE(64M) xen_swiotlb on | PAGE_SIZE(4K) --- Signed-off-by: Shane Xiao --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 22 -- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/dri

[PATCH] drm/amdgpu: Add secure display TA load for Renoir

Add secure display TA load for Renoir Signed-off-by: Shane Xiao --- drivers/gpu/drm/amd/amdgpu/psp_v12_0.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c index a2588200ea58..0b2ac418e4ac 100644