[PATCH 3/5] drm/amd/amdgpu: Tidy up of gfx_v6_0_setup_rb()

Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c index b7a70551d49f..2463fcae35a7 100644 --- a/drivers/gpu/drm/amd

Small cleanups for gfx6

Various cleanups to coding style for gfx6. Should be no functional changes. ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx

[PATCH umr] Make error/bug messages have a more consistent presentation

Signed-off-by: Tom St Denis --- src/app/enum.c | 2 +- src/app/scan.c | 2 +- src/app/scan_log.c | 2 +- src/app/set_bit.c | 4 ++-- src/app/set_reg.c | 4 ++-- src/app/top.c | 2 +- src/lib/create_mmio_accel.c | 2

Couple of cleanups for DCE6

Swap in uintNN_t types and a small clean up. Should be no functional changes. ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx

[PATCH 1/2] drm/amd/amdgpu: Clean up 32/64-bit types in DCE6

Replace uNN with uintNN_t types. In various places uintNN_t was already used. Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 204 +- 1 file changed, 102 insertions(+), 102 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

[PATCH 2/2] drm/amd/amdgpu: Tidy up static int dce_v6_0_get_num_crtc()

Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 11 +++ 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c index 1b6b9b22d780..ec7f7bb77f50 100644 --- a/drivers/gpu/drm/amd

[PATCH 1/2] drm/amd/amdgpu: Use 32/64-bit types in gmc6

Swap uNN for uintNN_t. Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 62 +-- 1 file changed, 31 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c index

[PATCH 2/2] drm/amd/amdgpu: Clean up gmc6 wait_for_idle

Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 8 +--- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c index 81f5aa9ff719..27db0710e9ab 100644 --- a/drivers/gpu/drm/amd/amdgpu

Re: [PATCH 1/2] drm/amd/amdgpu: Use 32/64-bit types in gmc6

On 16/05/17 06:51 AM, Christian König wrote: Am 15.05.2017 um 20:25 schrieb Tom St Denis: Swap uNN for uintNN_t. Signed-off-by: Tom St Denis Acked-by: Christian König Do we actually do something else than busy waiting for idle in one of the modules in the wait_for_idle callback? If no

Small cleanups for UVD42 and VCE2

Rounding off the SI cleanups for now are small NFC edits to the uvd42 and vce2 drivers. ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx

[PATCH 1/4] drm/amd/amdgpu: Use 32/64-bit types in uvd42

Swap uNN for uintNN_t. Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c index 8ab0f78794a5..eccf4c467fe1 100644

[PATCH 4/4] drm/amd/amdgpu: Use 32/64-bit types for VCE2

The uintNN_t types were already in use except for a few spots. Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/vce_v2_0.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v2_0.c index

[PATCH 3/4] drm/amd/amdgpu: Cleanup uvd_v4_2_soft_reset()

Use WREG32_FIELD instead. Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c index cd793c262674..d4e35ff8d9cd 100644 --- a

[PATCH 2/4] drm/amd/amdgpu: Tidy up uvd_v4_2_start()

Fix indentation and use WREG32_FIELD to clean up. Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c | 19 ++- 1 file changed, 6 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c b/drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c index

Various minor Display DCE120 cleanups

Various small tidy up patches for the dce120 display driver. Should be no functional changes. ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx

[PATCH 3/6] drm/amd/display: Make dce120_tg_is_blanked() more legible

Signed-off-by: Tom St Denis --- .../drm/amd/display/dc/dce120/dce120_timing_generator.c | 17 - 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce120

[PATCH 1/6] drm/amd/display: Tidy up dce120_timing_generator_enable_advanced_request()

Simplify the function by removing identical looking code blocks. Signed-off-by: Tom St Denis --- .../display/dc/dce120/dce120_timing_generator.c| 37 +++--- 1 file changed, 12 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce120

[PATCH 4/6] drm/amd/display: Clean up indentation in dce120_tg_set_blank()

Signed-off-by: Tom St Denis --- .../drm/amd/display/dc/dce120/dce120_timing_generator.c | 16 +--- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce120

[PATCH 5/6] drm/amd/display: Tidy up dce120_clock_source_create()

Also change sizeof to be automatic based on type declaration. Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_resource.c b/drivers/gpu

[PATCH 2/6] drm/amd/display: Fix indentation in dce120_tg_program_timing()

Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce120

[PATCH 6/6] drm/amd/display: Tidy up mem_input_program_surface_flip_and_addr()

Signed-off-by: Tom St Denis --- .../drm/amd/display/dc/dce120/dce120_mem_input.c | 27 -- 1 file changed, 9 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_mem_input.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_mem_input.c

[PATCH] drm/amd/amdgpu: Enable raven gpu_info firmware

Add CHIP_RAVEN to the list of ASICs that have gpu_info firmware. Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index

Re: [PATCH] drm/amd/amdgpu: Enable raven gpu_info firmware

On 18/05/17 10:07 AM, Zhang, Hawking wrote: IIRC It's already in amd-staging-4.9 branch. Anyway, the patch is Reviewed-by: Hawking Zhang It must have gone missing when Alex (Deucher) made the 4.11 branch. Thanks for the R-b but perhaps we should cherry-pick the patch from 4.9 if it's small

Re: [PATCH 5/5] drm/amd/amdgpu: Use modern 32/64-bit types in gfx6

On 23/05/17 10:28 AM, Deucher, Alexander wrote: -Original Message- From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Tom St Denis Sent: Monday, May 15, 2017 9:49 AM To: amd-gfx@lists.freedesktop.org Cc: StDenis, Tom Subject: [PATCH 5/5] drm/amd/amdgpu: Use modern

[PATCH] drm/amd/amdgpu: Return error if initiating read out of range on vram

If you initiate a read that is out of the VRAM address space return ENXIO instead of 0. Reads that begin below that point will read upto the VRAM limit as before. Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a

[PATCH umr] Add error checking to umr_read_vram().

Signed-off-by: Tom St Denis --- src/lib/read_vram.c | 27 ++- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/src/lib/read_vram.c b/src/lib/read_vram.c index deb958dc4c88..80ef4a5664de 100644 --- a/src/lib/read_vram.c +++ b/src/lib/read_vram.c @@ -155,7

Re: [PATCH 0/5] GFX9 KIQ

On 23/05/17 05:32 PM, Alex Deucher wrote: On Tue, May 23, 2017 at 5:31 PM, Alex Deucher wrote: On Fri, May 12, 2017 at 7:11 AM, Tom St Denis wrote: On 11/05/17 07:33 PM, Tom St Denis wrote: On 11/05/17 02:35 PM, Alex Deucher wrote: These are the laste of the gfx9 KIQ patches that haven&#

Re: [PATCH 0/5] GFX9 KIQ

On 24/05/17 09:10 AM, Deucher, Alexander wrote: -Original Message- From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Tom St Denis Sent: Wednesday, May 24, 2017 7:50 AM To: Alex Deucher Cc: amd-gfx list Subject: Re: [PATCH 0/5] GFX9 KIQ On 23/05/17 05:32 PM, Alex

Re: [PATCH 0/5] GFX9 KIQ

essage- >> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf >> Of Tom St Denis >> Sent: Wednesday, May 24, 2017 7:50 AM >> To: Alex Deucher >> Cc: amd-gfx list >> Subject: Re: [PATCH 0/5] GFX9 KIQ >> >> On 23/05/17 05:32 PM, Al

number of rings broken

Hi all, Just back after a week off ... first thing I see on my vega10 system is this patch: 83866f0fc72017d55f40cbd4160cd1e42a2cc3a8 is the first bad commit commit 83866f0fc72017d55f40cbd4160cd1e42a2cc3a8 Author: Andres Rodriguez Date: Thu Feb 2 00:38:22 2017 -0500 drm/amdgpu: allow sp

[PATCH] drm/amd/amdgpu: Fix ring initialization for GFX9

The commit 83866f0fc72017d55f40cbd4160cd1e42a2cc3a8 erroneously included the old ring init sequence along with the new one which uses shared header definitions. The fix which works on my vega10 seems to be to drop the old init sequence. Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd

Re: amd-gfx Digest, Vol 13, Issue 29

On 05/06/17 10:24 AM, Xie, AlexBin wrote: Hi, Tom, You have found a bug. Your patch looks fine for me. Have you confirmed the deleted part is older version? Perhaps search email list or git history to confirm? It looks like the edits to the older GFX files (7/8) simply changed that block o

Re: number of rings broken

On 05/06/17 11:32 AM, Alex Deucher wrote: On Mon, Jun 5, 2017 at 7:34 AM, Tom St Denis wrote: Hi all, Just back after a week off ... first thing I see on my vega10 system is this patch: 83866f0fc72017d55f40cbd4160cd1e42a2cc3a8 is the first bad commit commit

[PATCH drm] tests/amdgpu: Fix device_id option

The device_id option [-d] was badly broken. This commit fixes the width (was 8 is now 16 bits) as well as enables searches without specifying a bus id. It was also comparing "dev" from the bus field which is not the PCI device id. Signed-off-by: Tom St Denis --- tests/amdgpu/amd

Re: [PATCH 1/2] drm/amdgpu/gfx9: allocate queues horizontally across pipes

First is Reviewed-by: Tom St Denis and second is Acked-by. Cheers, Tom On 05/06/17 11:06 AM, Alex Deucher wrote: Pipes provide better concurrency than queues, therefore we want to make sure that apps use queues from different pipes whenever possible. Optimize for the trivial case where an

Re: [PATCH 2/3] drm/amdgpu: move gfx_v*_0_compute_queue_acquire to common code

Hi Alex, This failed to apply on top of amd-staging-4.11... Am I trying the wrong branch? Cheers, Tom On 07/06/17 11:10 AM, Alex Deucher wrote: Same function was duplicated in all gfx IP files. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 37 +

[PATCH umr] Tidy up memory reads.

ct this to reading vram only. TODO: 1. Detect IOMMU enabled and issue warning (if system bit is set in PDE/PTE) 2. Eventually filter sram reads through iommu reader (sysfs entry or something) Signed-off-by: Tom St Denis --- src/lib/read_vram.c | 78 ++-

Re: [PATCH 1/2] drm/amdgpu/gfx: fix MEC interrupt enablement for pipes != 0

On 09/06/17 08:49 AM, Alex Deucher wrote: The interrupt registers are not indexed. Fixes: 763a47b8e (drm/amdgpu: teach amdgpu how to enable interrupts for any pipe v3) Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 57 +++-- drivers/gpu/d

Re: [PATCH 1/2] drm/amdgpu/gfx: fix MEC interrupt enablement for pipes != 0

On 09/06/17 10:23 AM, Deucher, Alexander wrote: Could use WREG32_FIELD() here to simplify these. That doesn't work if you have variable register names as we do in this case. Which is why we have WREG32_FIELD_OFFSET :-) Tom ___ amd-gfx mailing list

Re: [PATCH 00/27] DC Linux Patches Jun 9, 2017

These don't apply on top of 4.11 it fails on patch 4 "drm/amd/display: Universal cursor plane hook-up." Maybe a rebase mistake when 4.11 was created? Tom On 09/06/17 04:11 PM, Harry Wentland wrote: * Universal cursor plane * Bunch of Raven fixes * Couple of fixes for IGT Amy Zhang (3):

[PATCH 1/2] drm/amd/amdgpu: gfx9 tidy ups

A couple of simple tidy ups to register programming. Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 26 +++--- 1 file changed, 7 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0

[PATCH 2/2] drm/amd/amdgpu: Rename KIQ ring to avoid spaces

Swap space for underscore in ring name. Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c index dfbf0273585f..e26108aad3fe

[PATCH] drm/amd/amdgpu: gfx9 tidy ups (v2)

A couple of simple tidy ups to register programming. Signed-off-by: Tom St Denis (v2): Avoid using 'data' unitialized --- drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 26 +++--- 1 file changed, 7 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/

[PATCH 08/10] drm/amd/amdgpu: Port PSP v3.1 over to new SOC15 macros

Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/psp_v3_1.c | 32 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v3_1.c b/drivers/gpu/drm/amd/amdgpu/psp_v3_1.c index 60a6407ba267..58ba3966f070 100644

[PATCH 10/10] drm/amd/amdgpu: Port VCN over to new SOC15 macros

Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 164 +- 1 file changed, 82 insertions(+), 82 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c index ec33e8fa83c1..21e7b88401e1 100644

[PATCH 09/10] drm/amd/amdgpu: Port PSP v10.0 over to new SOC15 macros

Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/psp_v10_0.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c index 8eb21fd83172..00c0f281f972 100644 --- a/drivers/gpu/drm

Various SOC15 macro cleanups

These replace some of the more verbose patterns with new SOC15 macros. Should be no functional change to anything. ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx

[PATCH 07/10] drm/amd/amdgpu: Port NBIO v7.0 driver over to new SOC15 macros

Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c | 42 ++ 1 file changed, 17 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c index 7e1206d1df6a..aa04632523fa 100644

[PATCH 03/10] drm/amd/amdgpu: Cleanup gfxhub read-modify-write patterns

Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 11 +++ 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c index 1c0b148b..a42f483767e7 100644 --- a/drivers/gpu

[PATCH 01/10] drm/amd/amdgpu: Add offset variant to SOC15 macros

Allows reading/writing via SOC15 macros with offset for various register banks. Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/soc15_common.h | 14 ++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/soc15_common.h b/drivers/gpu/drm/amd/amdgpu

[PATCH 04/10] drm/amd/amdgpu: Port MMHUB over to new SOC15 macros

Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 25 +++-- 1 file changed, 11 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c index 564d66c73875..f50b5a77f45a 100644 --- a

[PATCH 06/10] drm/amd/amdgpu: Port NBIO v6.1 driver over to new SOC15 macros

Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c | 54 +++--- 1 file changed, 23 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c b/drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c index 97057f4a10de..1e272f785def 100644

[PATCH 05/10] drm/amd/amdgpu: Port UVD 7.0 over to new SOC15 macros

Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 174 +- 1 file changed, 87 insertions(+), 87 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c index dd9ec81f116d..987b958368ac 100644

[PATCH 02/10] drm/amd/amdgpu: Port GFXHUB over to new SOC15 macros

Signed-off-by: Tom St Denis --- drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 26 -- 1 file changed, 12 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c index 90e6c28568eb..1c0b148b 100644

Re: [PATCH] drm/amd/display: Guard some DCN-only code in dc_debug

Acked-By: Tom St Denis It fixes the compile error but since I'm out of time today to actually test that's about all I can say. :-) Tom On 12/06/17 03:01 PM, Harry Wentland wrote: Fixing a compile error when building without CONFIG_DRM_AMD_DC_DCN1_0 Signed-off-by: Harr

Re: [PATCH] drm/amd/display: Guard some DCN-only code in dc_debug

On 12/06/17 03:09 PM, Tom St Denis wrote: Acked-By: Tom St Denis It fixes the compile error but since I'm out of time today to actually test that's about all I can say. :-) Seems to work fine and the delta is obviously correct so please add my RB if you w

[PATCH umr] Add ability to add pci/smc registers to database and fix minor related bugs

[24:31] == 105 (0x0069) Which correspond to 3.475V NB voltage for instance... Signed-off-by: Tom St Denis --- doc/umr.1| 9 +++-- src/app/main.c | 4 ++-- src/lib/update.c | 18 ++ 3 files changed, 23 insertions(+), 8 del

[PATCH umr] Don't read SGPR if wave isn't halted.

PG/CG are still enabled on Vega10. Signed-off-by: Tom St Denis --- src/app/print_waves.c | 40 ++-- 1 file changed, 22 insertions(+), 18 deletions(-) diff --git a/src/app/print_waves.c b/src/app/print_waves.c index e3662983d8d1..e157db9f9386 100644 --- a/src

[PATCH umr] Add ability to read/write SMC registers directly

On SI..VI platforms this allows access to SMC registers without kernel access. Signed-off-by: Tom St Denis --- src/app/main.c| 4 +- src/app/scan.c| 4 +- src/lib/mmio.c| 112 +++--- src/lib/read_sgpr.c | 4 +- src/lib

[PATCH umr] Add ability to read/write SMC registers directly (v2)

On SI..VI platforms this allows access to SMC registers without kernel access. Signed-off-by: Tom St Denis (v2): Use difference instances of accessors to SMC as well as properly break out use_pci/!use_pci support in the umr_read_smc/umr_write_smc functions. --- src/app/main.c| 4

Re: [PATCH umr] Add ability to read/write SMC registers directly

On 15/06/17 02:09 PM, Deucher, Alexander wrote: -Original Message- From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Tom St Denis Sent: Thursday, June 15, 2017 12:54 PM To: amd-gfx@lists.freedesktop.org Cc: StDenis, Tom Subject: [PATCH umr] Add ability to read

[PATCH umr] add Kaveri family to SMC read/write

Signed-off-by: Tom St Denis --- src/lib/mmio.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/lib/mmio.c b/src/lib/mmio.c index dfd9f0d33e5d..f0737c43913a 100644 --- a/src/lib/mmio.c +++ b/src/lib/mmio.c @@ -31,6 +31,7 @@ static uint32_t umr_smc_read(struct umr_asic *asic, uint64_t

[PATCH umr] Add new Polaris12 DID

Signed-off-by: Tom St Denis --- src/lib/discover_by_did.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/lib/discover_by_did.c b/src/lib/discover_by_did.c index c55b14063b1e..470a03006007 100644 --- a/src/lib/discover_by_did.c +++ b/src/lib/discover_by_did.c @@ -178,6 +178,7 @@ static

[PATCH umr] Install headers along with library/binary

Signed-off-by: Tom St Denis --- src/CMakeLists.txt | 4 1 file changed, 4 insertions(+) diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index e9eaeebc516c..640b7968e211 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -4,3 +4,7 @@ include_directories

[PATCH umr] Add demo external app

This commit adds the first external app demo. In this case a fan controller based on reading the GPU_TEMP sensor. It has a hard coded pwm path and instance which can be changed later. You have to "make install" umr first then you can build this with "make". Signed-

[PATCH umr] Add --update demo

In this commit we add a demo that reads the NB voltage sensor on a Carrizo in shell script. Signed-off-by: Tom St Denis --- demo/update/carrizo.update | 4 demo/update/read_sensor.sh | 17 + 2 files changed, 21 insertions(+) create mode 100644 demo/update/carrizo.update

Re: [PATCH] drm/amd/amdgpu: Add ENGINE_CNTL register to vcn10 headers

Hi, Alex can I get an RB on this :-) Thanks, Tom On Mon, Mar 4, 2019 at 10:59 AM StDenis, Tom wrote: > Signed-off-by: Tom St Denis > --- > drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h | 2 ++ > drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h | 5

Re: [PATCH] drm/amd/doc: add rough outline of tracepoint documentation

n the lists is inconsistent > > > -- > *From:* amd-gfx on behalf of > StDenis, Tom > *Sent:* Thursday, May 30, 2019 10:56 AM > *To:* amd-gfx@lists.freedesktop.org > *Cc:* StDenis, Tom > *Subject:* [PATCH] drm/amd/doc: add rough outline of tracepoint > documentation > > Sig

Re: [PATCH] drm/amd/amdgpu: remove vram_page_split kernel option (v2)

ping? On Tue, Jun 4, 2019 at 1:15 PM StDenis, Tom wrote: > This option is no longer needed. The default code paths > are now the only option. > > v2: Add HPAGE support and a default for non contiguous maps > > Signed-off-by: Tom St Denis > --- > drivers/gpu

[PATCH umr] Fix copy/paste error in error message

Also fix a couple of error message style deviations. Signed-off-by: Tom St Denis --- src/lib/mmio.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/lib/mmio.c b/src/lib/mmio.c index f0737c43913a..987704cb9944 100644 --- a/src/lib/mmio.c +++ b/src/lib/mmio.c

Re: [PATCH] Add PCI device based GPU selection with --pci

x 9662d05..8ab321f 100644 --- a/src/lib/discover.c +++ b/src/lib/discover.c @@ -22,6 +22,9 @@ * Authors: Tom St Denis * */ +#include +#include + #include "umr.h" static int is_did_match(struct umr_asic *asic, unsigned did) @@ -44,6 +47,43 @@ static int is_did_match(struct umr_asi

Re: [PATCH umr v2] Add PCI device based GPU selection with --pci

options.need_scan = 1; diff --git a/src/lib/discover.c b/src/lib/discover.c index 9662d05..a95fe57 100644 --- a/src/lib/discover.c +++ b/src/lib/discover.c @@ -22,6 +22,9 @@ * Authors: Tom St Denis * */ +#include +#include + #include "umr.h" static int is_did_

[PATCH umr 1/2] Tidy up formatting in new discovery code.

Signed-off-by: Tom St Denis --- src/lib/discover.c | 36 +++- 1 file changed, 23 insertions(+), 13 deletions(-) diff --git a/src/lib/discover.c b/src/lib/discover.c index a95fe57c9b4d..2faed79334ee 100644 --- a/src/lib/discover.c +++ b/src/lib/discover.c

[PATCH umr 2/2] Avoid using debugfs config data in no_kernel mode

Signed-off-by: Tom St Denis --- src/app/print_config.c | 2 +- src/lib/discover.c | 21 - src/lib/scan_config.c | 9 +++-- src/umr.h | 2 +- 4 files changed, 21 insertions(+), 13 deletions(-) diff --git a/src/app/print_config.c b/src/app

[PATCH umr] Improve --lookup command to allow register names.

:28] == 4 (0x0004) .ATOMIC[29:29] == 0 (0x) Signed-off-by: Tom St Denis --- doc/umr.1| 5 +++-- src/app/main.c | 6 +- src/app/umr_looku

[PATCH umr] Add ability to import new asic from script file

recise device otherwise it won't be able to talk to it. Signed-off-by: Tom St Denis --- demo/npi/new_chip | 2 + src/app/main.c| 1 + src/lib/CMakeLists.txt| 1 + src/lib/create_asic_from_script.c | 286 +

[PATCH umr] Add ability to import new asic from script file (v2)

recise device otherwise it won't be able to talk to it. Signed-off-by: Tom St Denis (v2): Added fakerizo demo and updated PCI detection logic to be more robust --- demo/npi/README | 2 + demo/npi/fakerizo | 26 demo/npi/new_chip | 2

[PATCH umr] Add script to parse kernel headers into npi script.

Assumes instance 0 and only supports smc/mmio registers at the moment but otherwise should work fine for soc15 devices. Signed-off-by: Tom St Denis --- scripts/npi.sh | 89 ++ 1 file changed, 89 insertions(+) create mode 100644 scripts

Re: [PATCH umr] top vram add visible vram usage info

Trying out the patch I see the following in the "vram" list VRAM: 1096/2048 vis 195/238 (MiB) xonotic-glx:( 4364) : 965612 KiB VRAM, 0 KiB vis VRAM, 5064 KiB GTT umr:( 4315) : 0 KiB VRAM, 0 KiB vis VRAM, 0 KiB

Re: [PATCH umr] top vram add visible vram usage info

125536 KiB VRAM, 11616 KiB vis VRAM, 21812 KiB GTT What's the value of visible_vram_size on your side? Regards, Qiang From: amd-gfx on behalf of Tom St Denis Sent: Tuesday, July 11, 2017 6:50:46 PM To: amd-gfx@lists.freedesktop.org Sub

Re: [PATCH] drm/amdgpu: fix amdgpu_bo_gpu_accessible()

Seems to fix the regression I noticed on Carrizo. Can add my Acked-By if you haven't pushed it already. Cheers, Tom On 13/07/17 08:19 AM, He, Roger wrote: Reviewed-and-Tested-by: Roger He Thanks Roger(Hongbo.He) -Original Message- From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesk

[PATCH umr] Add VCN rings to PM4 supported rings.

Signed-off-by: Tom St Denis --- src/app/ring_read.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/app/ring_read.c b/src/app/ring_read.c index d6b3df58be4d..714a54e4f5ea 100644 --- a/src/app/ring_read.c +++ b/src/app/ring_read.c @@ -52,6 +52,9 @@ void umr_read_ring(struct umr_asic

[PATCH umr] Add ability to follow IBs from VCN/UVD rings

This patch detects the sequence of PKT0 writes to registers which configure the VMID/ADDR/SIZE of the IBs in the ring and then chains them once all 4 pieces of information are found. Signed-off-by: Tom St Denis --- src/lib/ring_decode.c | 26 +- src/umr.h

[PATCH umr] Simple tidy up of PKT0 data printout.

Makes it more obvious which lines of output are the data and not headers for PKT0 format packets. Signed-off-by: Tom St Denis --- src/lib/ring_decode.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/lib/ring_decode.c b/src/lib/ring_decode.c index d87d489b1e4a

Re: [PATCH umr] Add SR-IOV detection and VF sampling on supported devices.

Applies cleanly but I can't get test it since I don't have a VM setup. If nobody objects to it in a short while I'll push it through. Tom On 13/07/17 12:19 PM, Jean-Francois Thibert wrote: Running the top command on the PF now allows monitoring activity for a single VF by using [] keys and als

[PATCH umr] Remove duplicate comparison in PM4 ring detection.

Signed-off-by: Tom St Denis --- src/app/ring_read.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/app/ring_read.c b/src/app/ring_read.c index 714a54e4f5ea..401a1ac87b8d 100644 --- a/src/app/ring_read.c +++ b/src/app/ring_read.c @@ -54,7 +54,6 @@ void umr_read_ring(struct umr_asic *asic

[PATCH umr 1/4] Remove 'risky' option --print command.

Signed-off-by: Tom St Denis --- demo/update/read_sensor.sh | 2 +- doc/umr.1 | 6 -- src/app/main.c | 8 +--- src/app/scan.c | 1 - src/app/set_bit.c | 1 - src/app/set_reg.c | 1 - src/lib/ip/gfx60.c | 15

Various upgrades to umr including VM/MMHUB decoding

This patch series reflects a slew of changes that fell out of team meetings with mesa/kmd members over the last week. We remove the "risky" option and the --print command since it's more annoying than helpful. We add the ability to specify the VMID in hex with --vram which is handy with the last

[PATCH umr 4/4] Add ability to halt waves and better VM decoding

mmhub (for say VCN) Signed-off-by: Tom St Denis --- doc/umr.1 | 6 +++ src/app/main.c | 15 +-- src/app/print_waves.c | 6 +++ src/lib/CMakeLists.txt | 1 + src/lib/dump_ib.c | 6 ++- src/lib/find_reg.c | 11 - src/lib/mmio.c

[PATCH umr 3/4] Various cleanups found by static analysis.

Signed-off-by: Tom St Denis --- src/app/enum.c | 4 ++-- src/lib/create_asic_helper.c | 5 + src/lib/discover.c | 9 +++-- src/lib/mmio.c | 8 4 files changed, 22 insertions(+), 4 deletions(-) diff --git a/src/app/enum.c b/src/app/enum.c

[PATCH umr 2/4] Add ability to specify VMID in hex

Signed-off-by: Tom St Denis --- doc/umr.1 | 5 +++-- src/app/main.c | 11 +++ 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/doc/umr.1 b/doc/umr.1 index dcab07d7953a..4c720ba48840 100644 --- a/doc/umr.1 +++ b/doc/umr.1 @@ -92,8 +92,9 @@ will operate regardless of

Re: Various upgrades to umr including VM/MMHUB decoding

On 24/07/17 11:47 AM, Alex Deucher wrote: On Mon, Jul 24, 2017 at 11:25 AM, Tom St Denis wrote: This patch series reflects a slew of changes that fell out of team meetings with mesa/kmd members over the last week. We remove the "risky" option and the --print command since it'

Re: Regression: Black screen after resume from powersave

Hi Martin, Thanks, this was also reported internally and I'm fairly certain Christian pushed a fix to the amd-staging-4.11 tree two weeks ago. I'm fairly certain this is the fix: d6729592ba0ed766bfe634d766ea8b58dbdd487d Which is in the public tree: https://cgit.freedesktop.org/~agd5f/linux/

umr: Various cleanups and better VM decoding

This series is a revamp of the series I sent out earlier in the week. To recap: Patch #1 removes the risky option and --print command. Patch #2 allows you to specify VMIDs in hex as well as decimal Patch #3 is a couple of simple cleanups found by review and static checking. Patch #4 includes

[PATCH umr 1/4] Remove 'risky' option --print command. (v2)

Signed-off-by: Tom St Denis Acked-by: Alex Deucher (v2) Remove --print from man page --- demo/update/read_sensor.sh | 2 +- doc/umr.1 | 9 - src/app/main.c | 8 +--- src/app/scan.c | 1 - src/app/set_bit.c | 1 - src/app

[PATCH umr 2/4] Add ability to specify VMID in hex

Signed-off-by: Tom St Denis Acked-by: Alex Deucher --- doc/umr.1 | 5 +++-- src/app/main.c | 11 +++ 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/doc/umr.1 b/doc/umr.1 index 9384c2430bda..0a991f9923a4 100644 --- a/doc/umr.1 +++ b/doc/umr.1 @@ -89,8 +89,9 @@ will

[PATCH umr 3/4] Various cleanups found by static analysis. (v2)

Signed-off-by: Tom St Denis Acked-by: Alex Deucher (v2): Updated enumerate to not stop on other AMD PCI devices --- src/app/enum.c | 4 +--- src/lib/create_asic_helper.c | 5 + src/lib/discover.c | 9 +++-- src/lib/mmio.c | 8 4 files

[PATCH umr 4/4] Add ability to halt waves and better VM decoding (v3)

mmhub (for say VCN) Signed-off-by: Tom St Denis Acked-by: Alex Deucher (v2): Tidy up AI verbose VM decoding output (v3): More details in verbose output and removed some duplicate DEBUG output --- doc/umr.1 | 13 +++ src/app/main.c | 56 - src/app

Re: [PATCH umr] wave_status: enable on Raven

RB'ed and pushed. On 26/07/17 06:23 AM, Nicolai Hähnle wrote: From: Nicolai Hähnle I've been using this for a while now. Signed-off-by: Nicolai Hähnle --- src/lib/wave_status.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/lib/wave_status.c b/src/lib/wave_status.

[PATCH umr] Improve NPI support (include/name/family)

of the ASIC so it's not tied to the filename. Signed-off-by: Tom St Denis --- demo/npi/fakerizo | 15 +--- demo/npi/fakerizo2| 16 + src/lib/create_asic_from_script.c | 139 ++ 3 files changed, 112 insertions(+

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