RE: [Intel-gfx] [PATCH 0/4] drm/amd/display: stop using drm_edid_override_connector_update()

; Siqueira, Rodrigo ; Wheeler, Daniel ; Wu, Hersen ; Chien, WenChieh (Jay) ; Deucher, Alexander Subject: Re: [Intel-gfx] [PATCH 0/4] drm/amd/display: stop using drm_edid_override_connector_update() On Tue, Aug 29, 2023 at 6:48 AM Jani Nikula wrote: > > On Wed, 23 Aug 2023, Jani Nikula wrote:

RE: [Intel-gfx] [PATCH 0/4] drm/amd/display: stop using drm_edid_override_connector_update()

, Rodrigo ; Wheeler, Daniel ; Wu, Hersen ; Daniel Vetter ; Chien, WenChieh (Jay) ; Deucher, Alexander ; Wentland, Harry Subject: Re: [Intel-gfx] [PATCH 0/4] drm/amd/display: stop using drm_edid_override_connector_update() On Wed, 23 Aug 2023, Jani Nikula wrote: > On Tue, 22 Aug 2023, Alex H

RE: [PATCH] drm/amd/display: fix flickering caused by S/G mode

To: Koenig, Christian ; amd-gfx@lists.freedesktop.org Cc: sta...@vger.kernel.org; Wentland, Harry ; Li, Sun peng (Leo) ; Siqueira, Rodrigo ; Deucher, Alexander ; Pan, Xinhui ; David Airlie ; Daniel Vetter ; Pillai, Aurabindo ; Zhuo, Qingqing (Lillian) ; Hans de Goede ; Wu, Hersen ; Wang, Chao

RE: [PATCH] drm/amd/display: Fix dsc mismatch of acquire and validationn of dsc engine

[AMD Official Use Only - General] Reviewed-by: Hersen Wu Regards! Hersen -Original Message- From: Bhawanpreet Lakha Sent: Wednesday, December 21, 2022 1:44 PM To: Swarnakar, Praful ; Wu, Hersen ; Deucher, Alexander Cc: amd-gfx@lists.freedesktop.org; Lakha, Bhawanpreet ; Liu

RE: [PATCH] drm/amd/display: Program color range and encoding correctly for DCN2+

Reviewed-by: Hersen Wu -Original Message- From: Chauhan, Ikshwaku Sent: Thursday, March 24, 2022 3:12 AM To: Wentland, Harry ; amd-gfx@lists.freedesktop.org Cc: Wentland, Harry ; sta...@vger.kernel.org; Wu, Hersen ; Kazlauskas, Nicholas ; VURDIGERENATARAJ, CHANDAN Subject: RE

RE: [PATCH] drm/amd/display: Not to call dpcd_set_source_specific_data during resume.

For boot up, we need another change. Thanks! Hersen -Original Message- From: Mahapatra, Rajib Sent: Thursday, January 20, 2022 2:33 PM To: Wentland, Harry ; Wu, Hersen ; Deucher, Alexander Cc: amd-gfx@lists.freedesktop.org; S, Shirish Subject: RE: [PATCH] drm/amd/display: Not to c

[PATCH] drm/amd/display: add dcn register DP_MSA_VBID_MISC for dcn1.x and dcn2.x

[AMD Official Use Only] This patch add missing AMD ASIC register for DP programming in up stream. >From 05768b78865d9b41a1d35e9f8e34901321208f2a Mon Sep 17 00:00:00 2001 From: Hersen Wu herse...@amd.com Date: Thu, 26 Aug 2021 12:49:08 -0400 Subject: [PATCH] drm/amd/displa

RE: [PATCH v3] drm/amd/display: Reject non-zero src_y and src_x for video planes

, Roman ; Wu, Hersen ; Wang, Danny Subject: [PATCH v3] drm/amd/display: Reject non-zero src_y and src_x for video planes [Why] This hasn't been well tested and leads to complete system hangs on DCN1 based systems, possibly others. The system hang can be reproduced by gesturing the video o

RE: [PATCH v2] Revert "drm/amd/display: Tune min clk values for MPO for RV"

[AMD Official Use Only - Internal Distribution Only] Reviewed-by: Hersen Wu -Original Message- From: Vishwakarma, Pratik Sent: Wednesday, January 20, 2021 11:52 PM To: Wu, Hersen ; Wentland, Harry ; amd-gfx@lists.freedesktop.org Cc: Vishwakarma, Pratik Subject: [PATCH v2] Revert

RE: [PATCH] Revert "drm/amd/display: Tune min clk values for MPO for RV"

[AMD Official Use Only - Internal Distribution Only] Reviewed-by: Hersen Wu -Original Message- From: Vishwakarma, Pratik Sent: Monday, January 18, 2021 6:04 AM To: Wu, Hersen ; amd-gfx@lists.freedesktop.org Cc: Vishwakarma, Pratik Subject: [PATCH] Revert "drm/amd/display: Tun

[PATCH] drm/amd/display: disable dcn10 pipe split by default

[AMD Official Use Only - Internal Distribution Only] [Why] the initial purpose of dcn10 pipe split is to support some high bandwidth mode which requires dispclk greater than max dispclk. By initial bring up power measurement data, it showed power consumption is less with pipe split for dcn block.

RE: [PATCH] drm/amd/display: Tune fclk for 4K OLED display

[AMD Official Use Only - Internal Distribution Only] Reviewed-by: Hersen Wu -Original Message- From: Vishwakarma, Pratik Sent: Monday, November 9, 2020 12:39 AM To: Wu, Hersen ; amd-gfx@lists.freedesktop.org Cc: Vishwakarma, Pratik Subject: [PATCH] drm/amd/display: Tune fclk for 4K

RE: [PATCH] drm/amd/display: Reject overlay plane configurations in multi-display scenarios

[AMD Official Use Only - Internal Distribution Only] Reviewed-by: Hersen Wu -Original Message- From: Nicholas Kazlauskas Sent: Wednesday, August 19, 2020 1:56 PM To: amd-gfx@lists.freedesktop.org Cc: Kazlauskas, Nicholas ; Wu, Hersen Subject: [PATCH] drm/amd/display: Reject

RE: [PATCH] drm/amd/dc: Read from DP_SINK_COUNT_ESI for DPDC r1.2 or higher

[AMD Official Use Only - Internal Distribution Only] -Original Message- From: Pillai, Aurabindo Sent: Tuesday, August 4, 2020 9:56 AM To: Lin, Wayne ; amd-gfx@lists.freedesktop.org Cc: Wu, Hersen ; Kazlauskas, Nicholas ; Siqueira, Rodrigo ; Zuo, Jerry Subject: Re: [PATCH] drm/amd

RE: [PATCH 5/7] drm/amd/display: Reset plane for anything that's not a FAST update

[AMD Official Use Only - Internal Distribution Only] Reviewed-by: Hersen Wu -Original Message- From: Nicholas Kazlauskas Sent: Thursday, July 30, 2020 4:37 PM To: amd-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org Cc: Kazlauskas, Nicholas ; Lakha, Bhawanpreet ; Wu, Hersen

RE: [PATCH 2/7] drm/amd/display: Reset plane when tiling flags change

, Rodrigo ; Wu, Hersen Subject: [PATCH 2/7] drm/amd/display: Reset plane when tiling flags change [Why] Enabling or disable DCC or switching between tiled and linear formats can require bandwidth updates. They're currently skipping all DC validation by being treated as purely surface up

Re: [PATCH] drm/amd/display: Get num_chans from VBIOS table

[AMD Official Use Only - Internal Distribution Only] Reviewed-by: Hersen Wu From: Bhawanpreet Lakha Sent: June 12, 2020 7:50 PM To: amd-gfx@lists.freedesktop.org ; Deucher, Alexander ; Kazlauskas, Nicholas ; Wu, Hersen Cc: Lee, Alvin ; Lakha, Bhawanpreet

RE: [PATCH] drm/amd/display: Revalidate bandwidth before commiting DC updates

[AMD Official Use Only - Internal Distribution Only] As workaround, the patch looks good. Reviewed-by: Hersen Wu -Original Message- From: Nicholas Kazlauskas Sent: Tuesday, June 2, 2020 8:54 PM To: amd-gfx@lists.freedesktop.org Cc: Kazlauskas, Nicholas ; Wu, Hersen ; Wentland, Harry

RE: [PATCH 2/2] drm/amdgpu/display: navi1x copy dcn watermark clock settings to smu resume from s3

[AMD Official Use Only - Internal Distribution Only] Hi Evan, Kenneth, Would you please help review this patch again? Thanks! Hersen -Original Message- From: Alex Deucher Sent: Monday, March 2, 2020 9:27 AM To: Wu, Hersen Cc: Quan, Evan ; amd-gfx@lists.freedesktop.org; Feng

Re: [PATCH 2/2] drm/amdgpu/display: navi1x copy dcn watermark clock settings to smu resume from s3

rq_resume_late(adev); + amdgpu_dm_smu_write_watermarks_table(adev); + return 0; } -- 2.17.1 ________ From: Quan, Evan Sent: February 27, 2020 9:58 PM To: Wu, Hersen ; amd-gfx@lists.freedesktop.org Cc: Feng, Kenneth ; Wu, Hersen Subject: RE: [PATCH 2/2] drm/amdgpu/d

RE: [PATCH] drm/amd/powerplay: Add SMU WMTABLE Validity Check for Renoir

[AMD Official Use Only - Internal Distribution Only] The patch looks good. Reviewed-by: Hersen Wu -Original Message- From: Liu, Zhan Sent: Friday, December 13, 2019 11:50 AM To: amd-gfx@lists.freedesktop.org; Wu, Hersen ; Deucher, Alexander ; Wang, Kevin(Yang) ; Quan, Evan ; Yin

RE: [PATCH v2] drm/amd/display: Loading NV10/14 Bounding Box Data Directly from Code

[AMD Official Use Only - Internal Distribution Only] Reviewed-by: hersen wu < hersenxs...@amd.com> -Original Message- From: Liu, Zhan Sent: Tuesday, December 3, 2019 12:49 PM To: amd-gfx@lists.freedesktop.org; Wu, Hersen ; Kazlauskas, Nicholas Cc: Liu, Zhan Subject: [PATCH v

RE: [PATCH] drm/amd/display: Add ENGINE_ID_DIGD condition check for Navi14

Reviewed-by: Hersen Wu -Original Message- From: Liu, Zhan Sent: Friday, November 1, 2019 9:35 PM To: Wu, Hersen ; amd-gfx@lists.freedesktop.org; Kazlauskas, Nicholas ; Lakha, Bhawanpreet ; Li, Roman ; Siqueira, Rodrigo ; Wentland, Harry ; Zuo, Jerry Cc: Yeh, Eagle ; Lazare

RE: [PATCH] drm/amd/display: Add ENGINE_ID_DIGD condition check for Navi14

, Zhan ; Siqueira, Rodrigo ; Wentland, Harry ; Wu, Hersen ; Zuo, Jerry Cc: Yeh, Eagle ; Lazare, Jordan Subject: [PATCH] drm/amd/display: Add ENGINE_ID_DIGD condition check for Navi14 From: Zhan liu Date: Fri, 1 Nov 2019 21:10:17 -0400 Subject: [PATCH] drm/amd/display: Add ENGINE_ID_DIGD condition

RE: [PATCH 1/2] SWDEV-183622 4k@60hz dp monitor always flicking

Hi, Kenneth, Ray, Would you please help review this change? Thanks, Hersen -Original Message- From: hersen wu Sent: Monday, April 15, 2019 10:18 AM To: amd-gfx@lists.freedesktop.org; Deucher, Alexander Cc: Wu, Hersen Subject: [PATCH 1/2] SWDEV-183622 4k@60hz dp monitor always

RE: [PATCH] drm/amd/display: Use context parameters to enable FBC

+ Roman -Original Message- From: S, Shirish Sent: Monday, February 4, 2019 4:20 AM To: Li, Sun peng (Leo) ; Wu, Hersen ; Wentland, Harry Cc: amd-gfx@lists.freedesktop.org; S, Shirish Subject: [PATCH] drm/amd/display: Use context parameters to enable FBC [What] FBC fails to get

RE: [PATCH] drm/amd/display: eDP fast bootup does not work for pre-raven asic

Hi, Alex, You are right! Thanks, Hersen From: Deucher, Alexander Sent: Tuesday, January 15, 2019 12:18 PM To: Wu, Hersen ; Alex Deucher Cc: Li, Sun peng (Leo) ; amd-gfx@lists.freedesktop.org; Wentland, Harry Subject: Re: [PATCH] drm/amd/display: eDP fast bootup does not work for pre-raven

RE: [PATCH] drm/amd/display: eDP fast bootup does not work for pre-raven asic

My change will NOT revert 95f05a3a2e6895ecfd8b4f64b5d6c6. Thanks Hersen -Original Message- From: Alex Deucher Sent: Tuesday, January 15, 2019 12:01 PM To: Wu, Hersen Cc: Deucher, Alexander ; Li, Sun peng (Leo) ; amd-gfx@lists.freedesktop.org; Wentland, Harry Subject: Re: [PATCH

RE: [PATCH] drm/amd/display: eDP fast bootup does not work for pre-raven asic

Harry's change. Thanks, Hersen From: Deucher, Alexander Sent: Tuesday, January 15, 2019 10:43 AM To: Li, Sun peng (Leo) ; amd-gfx@lists.freedesktop.org Cc: Wentland, Harry ; Wu, Hersen Subject: Re: [PATCH] drm/amd/display: eDP fast bootup does not work for pre-raven asic Can this pa

Re: [PATCH] drm/amd/powerplay: rv dal-pplib interface refactor powerplay part

ual_addr_low, @@ -332,6 +332,8 @@ struct pp_hwmgr_func { int (*smus_notify_pwe)(struct pp_hwmgr *hwmgr); int (*powergate_sdma)(struct pp_hwmgr *hwmgr, bool bgate); int (*enable_mgpu_fan_boost)(struct pp_hwmgr *hwmgr); +int (*set_hard_min_dcefclk_by_freq)(struct pp_hwmgr *hwmgr,

RE: [PATCH] drm/amd/powerplay: rv dal-pplib interface refactor powerplay part

Hello, Alex, Rex, Would you please help review the change? Thanks, Hersen [WHY] clarify dal input parameters to pplib interface, remove un-used parameters. dal knows exactly which parameters needed and their effects at pplib and smu sides. current dal sequence for dcn1_update_clock to ppl