[PATCH 03/16] drm/amd/display: Start documentation of DC

From: David Francis [Why] There are a lot of unintuitive parts of the dm-dc interface. It would help us if these were documented to provide a common understanding of what they are supposed to do [How] Most of this documentation is stubs, to be filled out more thoroughly by the experts Not

[PATCH 11/16] drm/amd/display: Add customizable tracing event

From: Chiawen Huang [why] add customizable log with a message input, which is for adding test log in debugging as printf function in ETW. [Usage] EVENT_LOG_CUST_MSG1("TestLog","Hello World %d=0x%x", 123, pDC); Signed-off-by: Chiawen Huang Reviewed-by: Tony Cheng Acked-by: Leo Li ---

[PATCH 06/16] drm/amd/display: Fix spelling of axis in modules/color/color_gamma.c

From: Krunoslav Kovac Use axis instead of axix Signed-off-by: Krunoslav Kovac Reviewed-by: Aric Cyr Acked-by: Anthony Koo Acked-by: Leo Li --- drivers/gpu/drm/amd/display/modules/color/color_gamma.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git

[PATCH 01/16] drm/amd/display: fix sporadic multiple aux transaction failure

From: Yogesh Mohan Marimuthu [why] When there are multiple aux transaction in parallel, it is sometime sporadically the aux transaction starts to continuously fail. The aux transaction was failing because the busy bit for the given gpio pin was always set. The busy bit was alway set because the

[PATCH 12/16] drm/amd/display: Copy crc_enabled when duplicating dm_crtc_state

From: Nicholas Kazlauskas [Why] When running igt@kms_plane@pixel-format-pipe-* tests the CRC read will time out and the test will fail. This is because the CRTC is duplicated but the crc_enabled parameter isn't copied over to the new dm_crtc_state. CRC reads will time out because

[PATCH 10/16] drm/amd/display: Re-arrange GFX9 fields

From: Nevenko Stupar For more clear usage in future Signed-off-by: Nevenko Stupar Reviewed-by: Tony Cheng Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc_hw_types.h

[PATCH 04/16] drm/amd/display: Add tracing to dc

From: David Francis [Why] Tracing is a useful and cheap debug functionality [How] This creates a new trace system amdgpu_dm, currently with three trace events amdgpu_dc_rreg and amdgpu_dc_wreg report the address and value of any dc register reads and writes amdgpu_dc_performance requires at

[PATCH 07/16] drm/amd/display: CTS 4.2.2.7

From: abdoulaye berthe [Why] Failure to read Detailed Capabilities Info. [How] Read Detailed Capbilities Info 80h-08Fh. Signed-off-by: abdoulaye berthe Reviewed-by: Wenjing Liu Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +- 1 file changed, 1 insertion(+), 1

[PATCH 08/16] drm/amd/display: Info frame cleanup

From: Harmanprit Tatla * Use provided infopacket in stream (if valid) instead of reconstructing in set_vendor_info_packet() * Use proper format for enums * Use dc info packet struct instead Signed-off-by: Harmanprit Tatla Reviewed-by: Anthony Koo Acked-by: Krunoslav Kovac Acked-by: Leo Li

[PATCH 02/16] drm/amd/display: 3.2.07

From: Steven Chiu Signed-off-by: Steven Chiu Reviewed-by: Shahin Khayyer Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index

[PATCH] drm/amdgpu: Document amdgpu_crtc->otg_inst and ->event fields

From: Leo Li These two fields are used by DC, and their purposes are not immediately clear. Signed-off-by: Leo Li --- drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 20 1 file changed, 20 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h

[PATCH] drm/amd: Update atom_smu_info_v3_3 structure

From: Leo Li Mainly adding the WAFL spread spectrum info, for adjusting display clocks when XGMI is enabled. Signed-off-by: Leo Li --- drivers/gpu/drm/amd/include/atomfirmware.h | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git

[PATCH 21/21] drm/amd/display: Add condition to sync eDP SW status and HW status

From: Lewis Huang [Why] Need to disable EDP backlight when enter S4 with EDP only and resume from S4 with secondary only. [How] Align the real hw and sw state via vBios scratch register in function enable_accelerated_mode when resume from S4. Signed-off-by: Lewis Huang Reviewed-by: Charlene

[PATCH 20/21] drm/amd/display: Remove the check to see if pp_display_cfg is changed

From: Fatemeh Darbehani [Why] When going to full-screen mode commit_planes_for_stream tries to decrease dcf_deep_sleep value, but safe_to_lower is false, so we don't send the new value to SMU but dc context gets updated. Later when dc_post_update_surfaces_to_stream tries to lower dcf_ds when

[PATCH 19/21] drm/amd/display: remove CRTC_3D_STRUCTURE_V_UPDATE_MODE bit programming.

From: Charlene Liu [Description] This is based on HW programming guide update. Signed-off-by: Charlene Liu Reviewed-by: Tony Cheng Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git

[PATCH 16/21] drm/amd/display: fix mirror rotation scaling math

From: Dmytro Laktyushkin Curretly dc will incorrectly calculate viewport when there is rotation or mirror being applied Signed-off-by: Dmytro Laktyushkin Reviewed-by: Su Chung Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 65 +-- 1 file

[PATCH 18/21] drm/amd/display: Expose target backlight level

From: Anthony Koo [Why] DM may want to understand any backlight optimizations applied, so DM needs a way to query from the HW both the real current backlight, which may be value during transition. And also target backlight, which may be after some backlight optimizations applied. [How] Add

[PATCH 17/21] drm/amd/display: Guard against null stream_state in set_crc_source

From: Nicholas Kazlauskas [Why] The igt@kms_plane@pixel-format-pipe tests can create a sequence where stream_state is NULL during amdgpu_dm_crtc_set_crc_source which results in a null pointer dereference. [How] Guard against stream_state being NULL before accessing its fields. This doesn't

[PATCH 15/21] drm/amd/display: Retiring set_display_requirements in dm_pp_smu.h - part4

From: Fatemeh Darbehani [Why] In DCN we want direct DC to SMU calls, with minimal interference from pplib. The reason for each pp_smu interface mapping to 1 SMU message is so we can have the sequencing of different SMU message in DC and shared across different OS's. This will also simplify

[PATCH 14/21] drm/amd/display: Remove program_csc_matrix

From: Krunoslav Kovac [Why] On DCN1/DCE, There are two functions programming OCSC: program_csc_matrix and program_output_csc. They do the same thing. [How] Consolidate to use only program_output_csc. Signed-off-by: Krunoslav Kovac Reviewed-by: Aric Cyr Acked-by: Leo Li ---

[PATCH 13/21] drm/amd/display: Fix some backlight variable styling

From: Anthony Koo variableNamingsLikeSo aren't to convention. use_this_instead. Signed-off-by: Anthony Koo Reviewed-by: Aric Cyr Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dm_services_types.h | 18 -- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git

[PATCH 11/21] drm/amd/display: Remove some old TODO's

From: Eric Bernstein They are no longer relevant Signed-off-by: Eric Bernstein Reviewed-by: Dmytro Laktyushkin Reviewed-by: Tony Cheng Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 6 -- 1 file changed, 6 deletions(-) diff --git

[PATCH 12/21] drm/amd/display: Expand dc to use 16.16 bit backlight

From: Anthony Koo [Why] We want to increase precision for backlight setting. But DC interface takes 8 bit backlight level value only. [How] DMCU already takes 16 bit backlight level. Expand the DC interface to take 16.16 bit value. Max 32 bit backlight value (0x) will represent max

[PATCH 10/21] drm/amd/display: Initial documentation for AMDgpu DC

From: Leo Li [Why] Documentation is helpful for the community to understand our code. This change does some high-level documentation of some DM interfaces with DRM, and the amdgpu base driver. [How] An entry for AMDgpu DC has been added to Documentation/gpu/drivers.rst TOC. amdgpu-dc.rst is

[PATCH 09/21] drm/amd/display: Fix potential nullptr error

From: Bhawanpreet Lakha [Why] Fix surface/plane potential nullptr [How] add null check Signed-off-by: Bhawanpreet Lakha Reviewed-by: Aric Cyr Acked-by: Leo Li --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 ++ 1 file changed, 6 insertions(+) diff --git

[PATCH 08/21] drm/amd/display: 3.2.04

From: Steven Chiu Signed-off-by: Steven Chiu Reviewed-by: Tony Cheng Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 4750a29..02db008

[PATCH 07/21] drm/amd/display: Fix up coverity issues

From: Aric Cyr [Why] Coverity found various high-impact issues that need resolving. [How] Fix some buffer overruns and uninitialized variables. Signed-off-by: Aric Cyr Reviewed-by: Tony Cheng Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/bios/bios_parser.c | 2 +-

[PATCH 06/21] drm/amd/display: remove interlace scaling adjustment

From: Dmytro Laktyushkin We do not need to adjust surface scaling when p2i is enabled and we do not support interlaced timing otherwise Signed-off-by: Dmytro Laktyushkin Reviewed-by: Tony Cheng Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 9 - 1 file

[PATCH 05/21] drm/amd/display: Add missing pipes registers for VGA enable/disable

From: Nevenko Stupar Signed-off-by: Nevenko Stupar Reviewed-by: Aric Cyr Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h

[PATCH 02/21] drm/amd/display: 3.2.03

From: SivapiriyanKumarasamy Signed-off-by: SivapiriyanKumarasamy Reviewed-by: Tony Cheng Reviewed-by: Steven Chiu Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h

[PATCH 03/21] drm/amd/display: Clip all remaining regamma points after first clipped point

From: SivapiriyanKumarasamy [Why] All values computed in the gamma curve after the first upperbound clipped point will need to be clipped anyways. We can avoid unnecessary computations and potential fixed point overflow by instead clipping these values to 1 automatically. [How] Track if

[PATCH 04/21] drm/amd/display: fix dml max voltage state

From: Dmytro Laktyushkin Gabe's formula sometimes uses values from non-existent 'unsupported' state to do validation. This change adds this extra state so validation can work correctly. Signed-off-by: Dmytro Laktyushkin Reviewed-by: Tony Cheng Acked-by: Leo Li ---

[PATCH 01/21] drm/amd/display: Set gamma not working on MPO planes

From: Krunoslav Kovac [Why] Set gamma not working on certain planes in MPO configuration Root cause is that video format (YUV-420) isn't allowed for IGAM where gamma is applied. Fix is not easy though: 1. allowing will not work because IGAM is before ICSC so RGB gamma would be applied on YUV

[PATCH 00/21] DC Patches Oct 25, 2018

From: Leo Li Summary of change: * Initial documentation of AMDgpu DM * Clean-up output CSC programming code * Some coverity fixes * Fix for possible null derefs in crc configuration and plane update paths Anthony Koo (3): drm/amd/display: Expand dc to use 16.16 bit backlight

[PATCH v2] drm: Get ref on CRTC commit object when waiting for flip_done

From: Leo Li This fixes a general protection fault, caused by accessing the contents of a flip_done completion object that has already been freed. It occurs due to the preemption of a non-blocking commit worker thread W by another commit thread X. X continues to clear its atomic state at the

[PATCH v2] drm: Get ref on CRTC commit object when waiting for flip_done

From: Leo Li This fixes a general protection fault, caused by accessing the contents of a flip_done completion object that has already been freed. It occurs due to the preemption of a non-blocking commit worker thread W by another commit thread X. X continues to clear its atomic state at the

[PATCH] drm/amdgpu/display: dm/amdgpu: make dp phy debugfs for eDP

From: hersen wu [WHY] dp debugfs file does not exist for eDP under /sys/kernel/debug/dri/0/eDP-1. the root is phy debugfs is created for dp connector only. [HOW] for eDP connector, create phy debugfs too. Signed-off-by: Hersen Wu Reviewed-by: David Francis Acked-by: Leo Li ---

[PATCH 16/16] drm/amd/display: Raise dispclk value for dce_update_clocks

From: Nicholas Kazlauskas [Why] The DISPCLK value was previously requested to be 15% higher for all ASICS that went through the dce110 bandwidth code path. As part of a refactoring of dce_clocks and dce110 set_bandwidth this was removed for power saving considerations. This changed caused

[PATCH 15/16] drm/amd/display: Fix Vega10 lightup on S3 resume

From: Roman Li [Why] There have been a few reports of Vega10 display remaining blank after S3 resume. The regression is caused by workaround for mode change on Vega10 - skip set_bandwidth if stream count is 0. As a result we skipped dispclk reset on suspend, thus on resume we may skip the clock

[PATCH 14/16] drm/amd/display: HLK Periodic Frame Notification test failed

From: Murton Liu [Why] Due to a small pre-fetch window, the active vline timing is a couple of lines off when compared to what it should be. [How] Changed the calculation for the start vline to account for this window. Signed-off-by: Murton Liu Reviewed-by: Aric Cyr Acked-by: Leo Li ---

[PATCH 12/16] drm/amd/display: Flatten irq handler data struct

From: Leo Li [Why] There is no reason why the common data needs to be kept separate. [How] Flatten the struct by moving common data into the DM IRQ struct. Signed-off-by: Leo Li Reviewed-by: David Francis Acked-by: Leo Li --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c | 37

[PATCH 13/16] drm/amd/display: fix Interlace video timing.

From: Charlene Liu [Description] interlace mode shows wrong vertical timing. Interface timing in Edid is half vertical timing as progressive timing. driver doubled the vertical timing in edid_paser, no need to double in optc again. Signed-off-by: Charlene Liu Reviewed-by: Chris Park Acked-by:

[PATCH 08/16] drm/amd/display: WA for DF keeps awake after S0i3.

From: Yongqiang Sun [Why] DF keeps awake after S0i3 resume due to DRAM_STATE_CNTL is set by bios command table during dcn init_hw. [How] As a work around, check STATE_CNTL status before init_hw, if it is 0 before init_hw and set to 1 after init_hw, change it to 0. Signed-off-by: Yongqiang Sun

[PATCH 09/16] drm/amd/display: Fix Edid emulation for linux

From: Bhawanpreet Lakha [Why] EDID emulation didn't work properly for linux, as we stop programming if nothing is connected physically. [How] We get a flag from DRM when we want to do edid emulation. We check if this flag is true and nothing is connected physically, if so we only program the

[PATCH 10/16] drm/amd/display: dc 3.1.68

From: Tony Cheng Signed-off-by: Tony Cheng Reviewed-by: Steven Chiu Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index f328483..1995271

[PATCH 11/16] drm/amd/display: fix memory leak in resource pools

From: Jun Lei [why] ddc engines were recently changed to be independently tracked from pipe count. the change was reflected in resource constructor but not in destructor. this manifests as a memory leak when pipe harvesting is enabled, since not all constructed ddc engines are freed [how]

[PATCH 06/16] drm/amd/display: block DP YCbCr420 modes

From: Eric Yang [why] Currently not supported, will black screen when set. [How] Fail validate timing helper for those modes. Signed-off-by: Eric Yang Reviewed-by: Tony Cheng Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c | 3 +++

[PATCH 07/16] drm/amd/display: clean up encoding checks

From: Eric Yang [Why] All ASICS we support has YCbCr support, so the check is unnecessary, the currently logic in validate output also returns true all the time, so the unneccessary logic is removed Signed-off-by: Eric Yang Reviewed-by: Tony Cheng Acked-by: Leo Li ---

[PATCH 04/16] drm/amd/display: Calculate swizzle mode using bpp during validation

From: Su Sung Chung [Why] Previously bandwidth validation was failing because swizzle mode was not initialized during plane_state allocation. The swizzle mode was calculated using pixed format which is how swizzle mode is initially calculated in addrlib. [How] * Set default swizzle mode for

[PATCH 05/16] drm/amd/display: Add function to fetch clock requirements

From: Eryk Brol Also add dram clock to clocks struct, for systems that uses them. Signed-off-by: Eryk Brol Reviewed-by: Jun Lei Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/core/dc.c | 13 + drivers/gpu/drm/amd/display/dc/dc.h | 4 +++-

[PATCH 03/16] drm/amd/display: Add a check-function for virtual signal type

From: Nikola Cornij [why] Same functions exist for all other signal types. [how] Add a function that checks against virtual signal type. Signed-off-by: Nikola Cornij Reviewed-by: Leo Li --- drivers/gpu/drm/amd/display/include/signal_types.h | 5 + 1 file changed, 5 insertions(+) diff

[PATCH 02/16] drm/amd/display: fix 4K stereo screen flash issue

From: Charlene Liu [Why] HDMI_scramber is not enabled for pixel rate >340Mhz. [How] Calculate the phy clock to include the Hw frame packing factor. Signed-off-by: Charlene Liu Reviewed-by: Chris Park Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 3 +++ 1 file

[PATCH 01/16] drm/amd/display: Add DC build_id to determine build type

From: Jun Lei [why] Sometimes there are indications that the incorrect driver is being loaded in automated tests. This change adds the ability for builds to be tagged with a string, and picked up by the test infrastructure. [how] dc.c will allocate const for build id, which is init-ed with

[PATCH 00/16] DC Patches Sep 26, 2018

From: Leo Li Summary of change: * Edid emulation fix * S3 resume fix on Vega10 * Add build types for internal tracking * Fix screen corruption on polaris * Interlace video timing fix Bhawanpreet Lakha (1): drm/amd/display: Fix Edid emulation for linux Charlene Liu (2): drm/amd/display: fix

[PATCH 7/7] drm/amd/display: Drop amdgpu_dm_prev_state struct

From: Leo Li [Why] It's not being used [How] Nuke it Signed-off-by: Leo Li Reviewed-by: David Francis Acked-by: Leo Li --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 9 - 1 file changed, 9 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

[PATCH 6/7] drm/amd/display: Drop amdgpu_display_manager.dal member

From: Leo Li [Why] It's not being used anymore. [How] Nuke it Signed-off-by: Leo Li Reviewed-by: David Francis Acked-by: Leo Li --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 -- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 2 -- 2 files changed, 4 deletions(-) diff

[PATCH 5/7] drm/amd/display: add query HPD interface.

From: Chiawen Huang [Why] current dc_link_detect function is not only detection but also update some link data. [How] added a pure get HPD state function. Signed-off-by: Chiawen Huang Reviewed-by: Tony Cheng Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 18

[PATCH 4/7] drm/amd/display: dc 3.1.66

From: Tony Cheng Signed-off-by: Tony Cheng Reviewed-by: Steven Chiu Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index a769d07..7691139

[PATCH 3/7] drm/amd/display: add aux i2c event log.

From: Chiawen Huang [Why] support i2c transition event log [How] refined aux REQ and REP events in aux flow. commented REQ and REP events in i2c flow. note: i2c event log is currently commented out. more work is required to find an portocol parser to and generate event for the parser

[PATCH 2/7] drm/amd/display: stop using switch for different CS revisions

From: Dmytro Laktyushkin Clock sources currently have support for asic specific function pointers. But actual separation into functions was never performed, leaving us with giant functions that rely on switch. This change creates separate functions, removing switch use. Signed-off-by: Dmytro

[PATCH 1/7] drm/amd/display: Fix 3D stereo issues.

From: Charlene Liu We were not providing the correct pixel clocks to DML for marks calculation. Signed-off-by: Charlene Liu Reviewed-by: Dmytro Laktyushkin Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c| 6 +-

[PATCH 0/7] DC Patches Sep 11, 2018

From: Leo Li Summary of change: * Clean up switch statements in DCE calcs * Minor clean-ups for amdgpu_dm Charlene Liu (1): drm/amd/display: Fix 3D stereo issues. Chiawen Huang (2): drm/amd/display: add aux i2c event log. drm/amd/display: add query HPD interface. Dmytro Laktyushkin (1):

[PATCH 01/11] drm/amd/display: Eliminate i2c hw function pointers

From: David Francis [Why] The function pointers of the dce_i2c_hw struct were never accessed from outside dce_i2c_hw.c and had only one version. As function pointers take up space and make debugging difficult, and they are not needed in this case, they should be removed. [How] Remove the

[PATCH 05/11] drm/amd/display: eliminate long wait between register polls on Maximus

From: Ken Chalmers [Why] Now that we "scale" time delays correctly on Maximus (as of diags svn r170115), the forced "35 ms" wait time now becomes 35 ms * 500 = 17.5 seconds, which is far too long. Even having to repeat polling a register once causes excessive delays on Maximus. [How] Just use

[PATCH 00/11] DC Patches Aug 22, 2018

From: Leo Li Summary of change: * Flattening and cleaning up of i2c code * Spelling and grammar fixups in amdgpu_dm * Implement hardware state logging via debugfs David Francis (4): drm/amd/display: Eliminate i2c hw function pointers drm/amd/display: Improve spelling, grammar, and

[PATCH 06/11] drm/amd/display: Fix memory leak caused by missed dc_sink_release

From: SivapiriyanKumarasamy [Why] There is currently an intermittent hang from a memory leak in DTN stress testing. It is caused by unfreed memory during driver disable. [How] Do a dc_sink_release in the case that skips it incorrectly. Signed-off-by: SivapiriyanKumarasamy Reviewed-by: Aric

[PATCH 03/11] drm/amd/display: Use non-deprecated vblank handler

From: "Leo (Sunpeng) Li" [Why] drm_handle_vblank is deprecated. Use drm_crtc_handle_vblank instead. Signed-off-by: Leo (Sunpeng) Li Reviewed-by: David Francis Acked-by: Leo Li --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 10 -- 1 file changed, 4 insertions(+), 6

[PATCH 09/11] drm/amd/display: Remove redundant i2c structs

From: David Francis [Why] The i2c code contains two structs that contain the same information as i2c_payload [How] Replace references to those structs with references to i2c_payload dce_i2c_transaction_request->status was written to but never read, so all references to it are removed

[PATCH 08/11] drm/amd/display: Support reading hw state from debugfs file

From: Nicholas Kazlauskas [Why] Logging hardware state can be done by triggering a write to the debugfs file. It would also be useful to be able to read the hardware state from the debugfs file to be able to generate a clean log without timestamps. [How] Usage: cat

[PATCH 10/11] drm/amd/display: support 48 MHZ refclk off

From: Eric Yang [Why] On PCO and up, whenever SMU receive message to indicate active display count = 0. SMU will turn off 48MHZ TMDP reference clock by writing to 1 TMDP_48M_Refclk_Driver_PWDN. Once this clock is off, no PHY register will respond to register access. This means our current

[PATCH 07/11] drm/amd/display: Improve spelling, grammar, and formatting of amdgpu_dm.c comments

From: David Francis [Why] Good spelling and grammar makes comments more pleasant and clearer. Linux has coding standards for comments that we should try to follow. [How] Fix obvious spelling and grammar issues Ensure all comments use '/*' and '*/' and multi-line comments follow linux

[PATCH 11/11] drm/amd/display: Flatten unnecessary i2c functions

From: David Francis [Why] The dce_i2c_hw code contained four funtcions that were only called in one place and did not have a clearly delineated purpose. [How] Inline these functions, keeping the same functionality. This is not a functional change. The functions disable_i2c_hw_engine and

[PATCH 02/11] drm/amd/display: dc 3.1.63

From: Tony Cheng Signed-off-by: Tony Cheng Reviewed-by: Steven Chiu Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 2bb7719..9ce14a2

[PATCH 04/11] drm/amd/display: Add support for hw_state logging via debugfs

From: Nicholas Kazlauskas [Why] We have logging methods for printing hardware state for newer ASICs but no way to trigger the log output. [How] Add support for triggering the output via writing to a debugfs file entry. Log output currently goes into dmesg for convenience, but accessing via a

[PATCH 2/2] drm/amd/display: Don't build DCN1 when kcov is enabled

From: "Leo (Sunpeng) Li" DCN1 contains code that utilizes fp math. When CONFIG_KCOV_INSTRUMENT_ALL and CONFIG_KCOV_ENABLE_COMPARISONS are enabled, build errors are found. See this earlier patch for details: https://lists.freedesktop.org/archives/dri-devel/2018-August/186131.html As a short

[PATCH 13/14] drm/amd/display: dc 3.1.62

From: Tony Cheng Change-Id: I5dd27f5520845636cc5d3957f7ee14b12485a73c Signed-off-by: Tony Cheng Reviewed-by: Steven Chiu Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h

[PATCH 11/14] drm/amd/display: Pass connector id when executing VBIOS CT

From: Mikita Lipski [why] Older ASICs require both phys_id and connector_id to execute bios command table. If we are not passing the right connector_id - it can lead to a black screen. [how] Set connector_obj_id when executing vbios command table Change-Id:

[PATCH 14/14] drm/amd/display: Program gamut remap as part of stream update

From: SivapiriyanKumarasamy Add gamut remap to dc_stream_update struct, and program if set when updating streams. Change-Id: Iad520a93af1fd5345b85a2216c53882548145962 Signed-off-by: SivapiriyanKumarasamy Reviewed-by: Anthony Koo Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/core/dc.c

[PATCH 12/14] drm/amd/display: Guard against null crtc in CRC IRQ

From: Nicholas Kazlauskas [Why] A null pointer deference can occur if crtc is null in amdgpu_dm_crtc_handle_crc_irq. This can happen if get_crtc_by_otg_inst returns NULL during dm_crtc_high_irq, leading to a hang in some IGT test cases. [How] Check that CRTC is non-null before accessing its

[PATCH 10/14] drm/amd/display: Check if clock source in use before disabling

From: Mikita Lipski [why] We are disabling clock source while other pipes are still using it, because we don't verify the number of pipes that share it. [how] - Adding a function in resources to return the number of pipes sharing the clock source. - Checking that no one is sharing the clock

[PATCH 03/14] drm/amd/display: Add dprefclk value to dce_dccg

From: Dmytro Laktyushkin This allows us to avoid any vbios bugs when initializing clocks Change-Id: Id29c32528b3d98c625f8921c2ef50da7d3de454c Signed-off-by: Dmytro Laktyushkin Reviewed-by: Charlene Liu Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c | 4 +++-

[PATCH 07/14] drm/amd/display: add retimer log for HWQ tuning use.

From: Charlene Liu Change-Id: If940d2adae8c51e66f705193d6bd2ac20c85cc5e Signed-off-by: Charlene Liu Reviewed-by: Dmytro Laktyushkin Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 59 ++ drivers/gpu/drm/amd/display/include/logger_types.h | 3 +-

[PATCH 01/14] drm/amd/display: dc 3.1.61

From: Tony Cheng Change-Id: I7401aaec323190bf12dae37bdee3ecf4971c6ab0 Signed-off-by: Tony Cheng Reviewed-by: Steven Chiu Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h

[PATCH 09/14] drm/amd/display: Allow clock sharing b/w HDMI and DVI

From: Mikita Lipski [why] HDMI and DVI share the same PHY clock and single link DVI and HDMI both use 4 lanes, so they should be allowed to be sharing the same clock source if all other parameters are satisfied. [how] Change a check for general DVI to Dual DVI. Change-Id:

[PATCH 06/14] drm/amd/display: Fix warning observed in mode change on Vega

From: "Jerry (Fangzhi) Zuo" [Why] DOUBLE_BUFFER_EN bit is getting cleared before enable blanking. That leads to CRTC_BLANK_DATA_EN is getting updated immediately. [How] Get DOUBLE_BUFFER_EN bit set, the same as DCE110. Change-Id: Ib88dc8b81b4e5dadca1fa086d2b509e491846396 Signed-off-by: Jerry

[PATCH 00/14] DC Patches Aug 08, 2018

From: "Leo (Sunpeng) Li" Summary of change: * Enable clock sharing b/w HDMI and single link DVI * Fix possible null pointer deref when fetching CRC Charlene Liu (2): drm/amd/display: fix single link DVI has no display drm/amd/display: add retimer log for HWQ tuning use. Dmytro Laktyushkin

[PATCH 08/14] drm/amd/display: Remove redundant non-zero and overflow check

From: "Leo (Sunpeng) Li" [Why] Unsigned int is guaranteed to be >= 0, and read_channel_reply checks for overflows. read_channel_reply also returns -1 on error, which is what dc_link_aux_transfer is expected to return on error. [How] Remove the if-statement. Return result of read_channel_reply

[PATCH 02/14] drm/amd/display: fix PIP bugs on Dal3

From: Gloria Li [Why] There are outstanding bugs for PIP in Dal3: -Crash when toggling PIP visibility -Global Alpha is not working, Adjusting global alpha doesn’t have an effect -Cursor is not working with pip plane and pipe splits -One flash occurs when cursor enters PIP plane from top/bottom

[PATCH 04/14] drm/amd/display: fix single link DVI has no display

From: Charlene Liu Change-Id: Ie73c190eb7caf8d07df66b0f94297e2dacd24afe Signed-off-by: Charlene Liu Reviewed-by: Dmytro Laktyushkin Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 ++ 1 file changed, 2 insertions(+) diff --git

[PATCH 05/14] drm/amd/display: fix dml handling of mono8/16 pixel formats

From: Dmytro Laktyushkin mono formats are treated exactly the same as equivallent bpp 444 formats. Dml validation however lacks 444 8 bit format while dml perf param calculation lacks mono format support This change makes them equivallent as far as the enum is concerned to avoid having to

[PATCH 1/7 v2] drm/amd/display: Remove unnecessary warning

From: Mikita Lipski [why] The warning message floods the dmesg log on Tonga even though it is expected to have a pix_clk set to zero, when the pipe is not active. [how] remove the assert Change-Id: I4ca1e42439369b2305694b403457b5de60fc4ab1 Signed-off-by: Mikita Lipski Reviewed-by: Harry

[PATCH 7/7] drm/amd/display: dal 3.1.58

From: Harry Wentland Change-Id: I788210abbb33e0a38267c9bfd3656f51c844d5ac Signed-off-by: Harry Wentland Reviewed-by: Aric Cyr Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h

[PATCH 6/7] drm/amd/display: separate dc_debug into dc_debug_options and dc_debug data

From: Jun Lei [why] confusing as to which part of debug is informational, and which part causes behavioral change Change-Id: I3248c1576c405d3e4deb30e9514098d13390158d Signed-off-by: Jun Lei Reviewed-by: Tony Cheng Acked-by: Leo Li --- drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c |

[PATCH 3/7] drm/amd/display: On dce100, set clocks to 0 on suspend

From: David Francis [Why] When a dce100 asic was suspended, the clocks were not set to 0. Upon resume, the new clock was compared to the existing clock, they were found to be the same, and so the clock was not set. This resulted in a pernicious blackscreen. [How] In atomic commit, check to see

[PATCH 2/7] drm/amd/display: allow diags to skip initial link training

From: Tony Cheng [why] diag specify what the full config and is only concerned about pass/fail at the end having inter-op code like verifiying we can actually train at reported link rate slows down diag test and add complexity we don't need [how] add dc_debug option to skip capability link

[PATCH 5/7] drm/amd/display: Decouple aux from i2c

From: Bhawanpreet Lakha [Why] Aux engine is created from i2caux layer. We want to remove this layer and use the engine directly. [How] Decouple aux engine from i2caux. Move aux engine related code to dce folder and use dc resource pool to manage the engine. And use the engine functions

[PATCH 0/7] DC Patches Jul 17, 2018

From: "Leo (Sunpeng) Li" Summary of change: * De-midlayering work on AUX engine * Fix S3 resume blackscreen for DCE10 * De-spamming of log for DCE10 Bhawanpreet Lakha (1): drm/amd/display: Decouple aux from i2c David Francis (1): drm/amd/display: On dce100, set clocks to 0 on suspend

[PATCH 1/7] drm/amd/display: Remove unnecessary warning

From: Mikita Lipski [why] The warning message floods the dmesg log on Tonga even though it is expected to have a pix_clk set to zero, when there is no display connected. [how] remove the assert Change-Id: I4ca1e42439369b2305694b403457b5de60fc4ab1 Signed-off-by: Mikita Lipski Reviewed-by: Harry

[PATCH 4/7] drm/amd/display: DPP CM ICSC AYCRCB8888 format support

From: vikrant mhaske [why] Diags has POR to run the video workload using AYCRCB through DCN; capture it through DWB and send it to VCN hardware to encode [how] added the code to support this format so that DPP ICSC will be able to convert it from YUV444 to internal RGB and DWB OCSC will be

[PATCH] drm/amd/display: Fix DP HBR2 Eye Diagram Pattern on Carrizo

From: Hersen Wu [why] dp hbr2 eye diagram pattern for raven asic is not stabled. workaround is to use tp4 pattern. But this should not be applied to asic before raven. [how] add new bool varilable in asic caps. for raven asic, use the workaround. for carrizo, vega, do not use workaround.

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