Re: [PATCH] Set vm_update_mode=0 as default for Sienna Cichlid in SRIOV case

2022-10-04 Thread Christian König
Am 04.10.22 um 16:08 schrieb Danijel Slivka: CPU pagetable updates have issues with HDP flush as VF MMIO access protection is not allowing write during sriov runtime to mmBIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL The subject should have a drm/amdgpu prefix and in general Felix need to

[PATCH] Set vm_update_mode=0 as default for Sienna Cichlid in SRIOV case

2022-10-04 Thread Danijel Slivka
CPU pagetable updates have issues with HDP flush as VF MMIO access protection is not allowing write during sriov runtime to mmBIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL Signed-off-by: Danijel Slivka --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 +++- 1 file changed, 3 insertions(+), 1