, Tom
Subject: [PATCH] drm/amd/amdgpu: Add SQ debug registers to GFX10 headers
Requested for UMR support.
Signed-off-by: Tom St Denis
---
.../include/asic_reg/gc/gc_10_1_0_offset.h| 1 +
.../include/asic_reg/gc/gc_10_1_0_sh_mask.h | 20 +++
.../include/asic_reg/gc
Requested for UMR support.
Signed-off-by: Tom St Denis
---
.../include/asic_reg/gc/gc_10_1_0_offset.h| 1 +
.../include/asic_reg/gc/gc_10_1_0_sh_mask.h | 20 +++
.../include/asic_reg/gc/gc_10_3_0_offset.h| 1 +
.../include/asic_reg/gc/gc_10_3_0_sh_mask.h | 19