The PWR block was merged into the SMUIO block by revision 12 so we add
that to the smuio_12_0_0 headers and then create a new smio_10_0_0 that
raven1 can use in conjunction with the pwr_10_0 headers.
Signed-off-by: Tom St Denis
---
.../asic_reg/smuio/smuio_10_0_0_offset.h | 27 +
The PWR block was merged into the SMUIO block by revision 12 so we add
that to the smuio_12_0_0 headers.
(v2): Drop nonsensical smuio_10_0_0 header
Signed-off-by: Tom St Denis
---
.../gpu/drm/amd/include/asic_reg/smuio/smuio_12_0_0_offset.h | 3 +++
.../drm/amd/include/asic_reg/smuio/smuio_12_0
?
Alex
From: amd-gfx on behalf of Tom St Denis
Sent: Wednesday, March 25, 2020 3:22 PM
To: amd-gfx@lists.freedesktop.org
Cc: StDenis, Tom
Subject: [PATCH] drm/amd/amdgpu: Fix SMUIO/PWR Confusion (v2)
The PWR block was merged into the SMUIO block by revision
Sent: Wednesday, March 25, 2020 3:22 PM
To: amd-gfx@lists.freedesktop.org
Cc: StDenis, Tom
Subject: [PATCH] drm/amd/amdgpu: Fix SMUIO/PWR
Confusion (v2)
The PWR block was merged into the
On Wed, Mar 25, 2020 at 3:22 PM Tom St Denis wrote:
>
> The PWR block was merged into the SMUIO block by revision 12 so we add
> that to the smuio_12_0_0 headers.
>
> (v2): Drop nonsensical smuio_10_0_0 header
>
> Signed-off-by: Tom St Denis
Reviewed-by: Alex Deucher
> ---
> .../gpu/drm/amd/i
