pcie speeds and widths. Other
than peer to peer transfers, it doesn't make sense to run the
clock/lanes higher than the slowest link in the hierarchy.
Alex
>
> Best Regards,
> Harish
>
>
>
>
>
> From: Alex Deucher
> Sent: Monday, February 4, 2019 1:53 PM
> To: Ka
orking is not the issue here. SMU (or rather PPTable) has to be updated with
highest PCI Gen supported by the system.
Best Regards,
Harish
From: Alex Deucher
Sent: Monday, February 4, 2019 1:53 PM
To: Kasiviswanathan, Harish
Cc: Li, Colin; Xi, Sheldon; amd-gfx@lists.freedesktop.org
Subject
the bridge supports gen4, it should work even if down
upstream link has less bandwidth.
Alex
>
>
> Best Regards,
> Harish
>
>
>
>
>
> From: Alex Deucher
> Sent: Friday, February 1, 2019 5:53 PM
> To: Kasiviswanathan, Harish
> Cc: Li, Colin;
From: Alex Deucher
Sent: Friday, February 1, 2019 5:53 PM
To: Kasiviswanathan, Harish
Cc: Li, Colin; Xi, Sheldon; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amd/powerplay: add override pcie parameters for Vega20
(v2)
Right. we have the max gen and width supported by the
t; *To:* Kasiviswanathan, Harish
> *Cc:* amd-gfx@lists.freedesktop.org
> *Subject:* Re: [PATCH] drm/amd/powerplay: add override pcie parameters
> for Vega20 (v2)
>
> Do we actually need the current status? We have the caps of the platform
> and the device. For the lowest dpm sta
s,
Harish
From: Alex Deucher
Sent: Friday, February 1, 2019 5:34 PM
To: Kasiviswanathan, Harish
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amd/powerplay: add override pcie parameters for Vega20
(v2)
Do we actually need the current status? We have the caps of the
nformation for future use.
>
> Best Regards,
> Harish
>
>
> --
> *From:* Alex Deucher
> *Sent:* Friday, February 1, 2019 5:09 PM
> *To:* Kasiviswanathan, Harish
> *Cc:* amd-gfx@lists.freedesktop.org
> *Subject:* Re: [PATCH] drm/amd/powerp
t_pcie_info() to read "PCI_EXP_LINKSTA"
and store that information for future use.
Best Regards,
Harish
From: Alex Deucher
Sent: Friday, February 1, 2019 5:09 PM
To: Kasiviswanathan, Harish
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/a
On Fri, Feb 1, 2019 at 4:17 PM Kasiviswanathan, Harish
wrote:
>
> v2: Use PCIe link status instead of link capability
> Send override message after SMU enable features
>
> Change-Id: Iea2a1ac595cf63a9528ff1e9a6955d14d8c3a6d5
> Signed-off-by: Harish Kasiviswanathan
> ---
> drivers/gpu/drm/amd
v2: Use PCIe link status instead of link capability
Send override message after SMU enable features
Change-Id: Iea2a1ac595cf63a9528ff1e9a6955d14d8c3a6d5
Signed-off-by: Harish Kasiviswanathan
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 93 +++---
1 file changed, 6
Acked-by: Alex Deucher
From: amd-gfx on behalf of Huang,
JinHuiEric
Sent: Friday, January 25, 2019 5:24:50 PM
To: amd-gfx@lists.freedesktop.org
Cc: Huang, JinHuiEric
Subject: [PATCH] drm/amd/powerplay: add override pcie parameters for Vega20
It is to solve
It is to solve RDMA performance issue.
Change-Id: I441d2943e504e2ef7d33de0e8773a0f9b8fdb2ca
Signed-off-by: Eric Huang
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 46 ++
1 file changed, 46 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmg
12 matches
Mail list logo
