[PATCH 095/138] drm/amd/powerplay: add interface to get max high clocks for display

[Huang Rui]

This patch adds interface to get max high clocks for display and in smu v11
didn't have this implementation.

Signed-off-by: Huang Rui <ray.hu...@amd.com>
Reviewed-by: Evan Quan <evan.q...@amd.com>
Reviewed-by: Kevin Wang <kevin1.w...@amd.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 7 +++++++
 drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h           | 4 ++++
 2 files changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
index 51c2515..f01e440 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
@@ -335,6 +335,13 @@ bool dm_pp_get_clock_levels_by_type(
                        validation_clks.memory_max_clock = 80000;
                        validation_clks.level = 0;
                }
+       } else if (adev->smu.funcs && adev->smu.funcs->get_max_high_clocks) {
+               if (smu_get_max_high_clocks(&adev->smu, &validation_clks)) {
+                       DRM_INFO("DM_PPLIB: Warning: using default validation 
clocks!\n");
+                       validation_clks.engine_max_clock = 72000;
+                       validation_clks.memory_max_clock = 80000;
+                       validation_clks.level = 0;
+               }
        }
 
        DRM_INFO("DM_PPLIB: Validation clocks:\n");
diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h 
b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index a0bc8dd..256c11d 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -272,6 +272,8 @@ struct smu_funcs
        int (*get_clock_by_type)(struct smu_context *smu,
                                 enum amd_pp_clock_type type,
                                 struct amd_pp_clocks *clocks);
+       int (*get_max_high_clocks)(struct smu_context *smu,
+                                  struct amd_pp_simple_clock_info *clocks);
 };
 
 #define smu_init_microcode(smu) \
@@ -375,6 +377,8 @@ struct smu_funcs
        ((smu)->funcs->store_cc6_data ? (smu)->funcs->store_cc6_data((smu), 
(st), (cc6_dis), (pst_dis), (pst_sw_dis)) : 0)
 #define smu_get_clock_by_type(smu, type, clocks) \
        ((smu)->funcs->get_clock_by_type ? 
(smu)->funcs->get_clock_by_type((smu), (type), (clocks)) : 0)
+#define smu_get_max_high_clocks(smu, clocks) \
+       ((smu)->funcs->get_max_high_clocks ? 
(smu)->funcs->get_max_high_clocks((smu), (clocks)) : 0)
 
 extern int smu_get_atom_data_table(struct smu_context *smu, uint32_t table,
                                   uint16_t *size, uint8_t *frev, uint8_t *crev,
-- 
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx