From: "Tianci.Yin"
remove registers: mmSPI_CONFIG_CNTL
add registers: mmSPI_CONFIG_CNTL_1
Change-Id: I8d1c5d0a0553d60a6e419d6acb9750e5b2634e49
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/dr
From: "Tianci.Yin"
add registers: mmPA_SC_BINNER_TIMEOUT_COUNTER and mmPA_SC_ENHANCE_2
Change-Id: I23dabb0e706af0b5376f9749200832e894944eca
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_
(Rico)
Subject: RE: [PATCH 1/2] drm/amdgpu/gfx10: update gfx golden settings
Series is Reviewed-by: Feifei Xu
-Original Message-
From: Tianci Yin
Sent: Wednesday, December 11, 2019 11:22 AM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Xu, Feifei ;
Yuan, Xiaojie ; Long, Gang
Series is Reviewed-by: Feifei Xu
-Original Message-
From: Tianci Yin
Sent: Wednesday, December 11, 2019 11:22 AM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Xu, Feifei ;
Yuan, Xiaojie ; Long, Gang ; Li,
Pauline ; Yin, Tianci (Rico)
Subject: [PATCH 1/2] drm/amdgpu/gfx10
From: "Tianci.Yin"
add registers: mmSPI_CONFIG_CNTL
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index ed630d37c32c..f3324fa4e194 100644
From: "Tianci.Yin"
update registers: mmUTCL1_CTRL
Change-Id: Icb50fb35a427a50a06138b8b3715651eebe92b95
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/