[PATCH 2/5] drm/amd/pm: add Navi1x deep sleep control interface

[Evan Quan]

This is needed for UMD pstate switch.

Change-Id: Icd5d207359b7b83c1dd689a41fd9b48f537cde9a
Signed-off-by: Evan Quan <evan.q...@amd.com>
---
 .../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c   | 34 +++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index c968f05533d9..ddb693888d64 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -2578,6 +2578,39 @@ static int navi10_enable_mgpu_fan_boost(struct 
smu_context *smu)
                                               NULL);
 }
 
+static int navi10_deep_sleep_control(struct smu_context *smu,
+                                    bool enablement)
+{
+       struct amdgpu_device *adev = smu->adev;
+       int ret = 0;
+
+       if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DS_GFXCLK_BIT)) {
+               ret = smu_cmn_feature_set_enabled(smu, 
SMU_FEATURE_DS_GFXCLK_BIT, enablement);
+               if (ret) {
+                       dev_err(adev->dev, "Failed to %s GFXCLK DS!\n", 
enablement ? "enable" : "disable");
+                       return ret;
+               }
+       }
+
+       if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DS_SOCCLK_BIT)) {
+               ret = smu_cmn_feature_set_enabled(smu, 
SMU_FEATURE_DS_SOCCLK_BIT, enablement);
+               if (ret) {
+                       dev_err(adev->dev, "Failed to %s SOCCLK DS!\n", 
enablement ? "enable" : "disable");
+                       return ret;
+               }
+       }
+
+       if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_DS_LCLK_BIT)) {
+               ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_DS_LCLK_BIT, 
enablement);
+               if (ret) {
+                       dev_err(adev->dev, "Failed to %s LCLK DS!\n", 
enablement ? "enable" : "disable");
+                       return ret;
+               }
+       }
+
+       return ret;
+}
+
 static const struct pptable_funcs navi10_ppt_funcs = {
        .get_allowed_feature_mask = navi10_get_allowed_feature_mask,
        .set_default_dpm_table = navi10_set_default_dpm_table,
@@ -2661,6 +2694,7 @@ static const struct pptable_funcs navi10_ppt_funcs = {
        .get_gpu_metrics = navi10_get_gpu_metrics,
        .enable_mgpu_fan_boost = navi10_enable_mgpu_fan_boost,
        .gfx_ulv_control = smu_v11_0_gfx_ulv_control,
+       .deep_sleep_control = navi10_deep_sleep_control,
 };
 
 void navi10_set_ppt_funcs(struct smu_context *smu)
-- 
2.28.0

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx