Only PP_MP1_STATE_UNLOAD is supported for now. For other mp1 state, we
should just ignore it. Otherwise, there will be errors coming out.

Signed-off-by: Evan Quan <evan.q...@amd.com>
Reviewed-by: Hawking Zhang <hawking.zh...@amd.com>
Acked-by: Alex Deucher <alexander.deuc...@amd.com>
Change-Id: I15427d6daf14d5c82a6e7f9d32fdea60a80fd0ec
---
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c  | 19 ++++++++++++++++++-
 .../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c  | 19 ++++++++++++++++++-
 2 files changed, 36 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index fe7528c83843..1e0109c10e06 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -1608,6 +1608,23 @@ static bool smu_v13_0_0_is_mode1_reset_supported(struct 
smu_context *smu)
        return true;
 }
 
+static int smu_v13_0_0_set_mp1_state(struct smu_context *smu,
+                                    enum pp_mp1_state mp1_state)
+{
+       int ret;
+
+       switch (mp1_state) {
+       case PP_MP1_STATE_UNLOAD:
+               ret = smu_cmn_set_mp1_state(smu, mp1_state);
+               break;
+       default:
+               /* Ignore others */
+               ret = 0;
+       }
+
+       return ret;
+}
+
 static const struct pptable_funcs smu_v13_0_0_ppt_funcs = {
        .get_allowed_feature_mask = smu_v13_0_0_get_allowed_feature_mask,
        .set_default_dpm_table = smu_v13_0_0_set_default_dpm_table,
@@ -1672,7 +1689,7 @@ static const struct pptable_funcs smu_v13_0_0_ppt_funcs = 
{
        .baco_exit = smu_v13_0_baco_exit,
        .mode1_reset_is_support = smu_v13_0_0_is_mode1_reset_supported,
        .mode1_reset = smu_v13_0_mode1_reset,
-       .set_mp1_state = smu_cmn_set_mp1_state,
+       .set_mp1_state = smu_v13_0_0_set_mp1_state,
 };
 
 void smu_v13_0_0_set_ppt_funcs(struct smu_context *smu)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
index 3358be877b56..ea99c38d4e55 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
@@ -1554,6 +1554,23 @@ static int smu_v13_0_7_set_power_profile_mode(struct 
smu_context *smu, long *inp
        return ret;
 }
 
+static int smu_v13_0_7_set_mp1_state(struct smu_context *smu,
+                                    enum pp_mp1_state mp1_state)
+{
+       int ret;
+
+       switch (mp1_state) {
+       case PP_MP1_STATE_UNLOAD:
+               ret = smu_cmn_set_mp1_state(smu, mp1_state);
+               break;
+       default:
+               /* Ignore others */
+               ret = 0;
+       }
+
+       return ret;
+}
+
 static const struct pptable_funcs smu_v13_0_7_ppt_funcs = {
        .get_allowed_feature_mask = smu_v13_0_7_get_allowed_feature_mask,
        .set_default_dpm_table = smu_v13_0_7_set_default_dpm_table,
@@ -1611,7 +1628,7 @@ static const struct pptable_funcs smu_v13_0_7_ppt_funcs = 
{
        .baco_set_state = smu_v13_0_baco_set_state,
        .baco_enter = smu_v13_0_baco_enter,
        .baco_exit = smu_v13_0_baco_exit,
-       .set_mp1_state = smu_cmn_set_mp1_state,
+       .set_mp1_state = smu_v13_0_7_set_mp1_state,
 };
 
 void smu_v13_0_7_set_ppt_funcs(struct smu_context *smu)
-- 
2.29.0

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