[PATCH 32/40] drm/amd/display: Fix null timing generator resource

[Rodrigo Siqueira]

From: Eric Bernstein <eric.bernst...@amd.com>

[Why]
For some customer blending transition cases, the
available pipe for second stream is a pipe index that is
greater than the number of timing generators, which
can cause a problem in acquire_first_free_pipe since it
assumes same index for pipe and timing generator

[How]
Added logic to use last timing generator index
if the pipe index is greater than number of timing generators.

Acked-by: Alan Liu <haoping....@amd.com>
Signed-off-by: Eric Bernstein <eric.bernst...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c 
b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index 3d45f6cae1f7..f7b47bf3ee59 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -1885,6 +1885,12 @@ static int acquire_first_free_pipe(
                                pipe_ctx->plane_res.mpcc_inst = 
pool->dpps[i]->inst;
                        pipe_ctx->pipe_idx = i;
 
+                       if (i >= pool->timing_generator_count) {
+                               int tg_inst = pool->timing_generator_count - 1;
+
+                               pipe_ctx->stream_res.tg = 
pool->timing_generators[tg_inst];
+                               pipe_ctx->stream_res.opp = pool->opps[tg_inst];
+                       }
 
                        pipe_ctx->stream = stream;
                        return i;
-- 
2.25.1