[PATCH 37/51] drm/amd/display: Convert 10kHz clks from PPLib into kHz

[Harry Wentland]

From: Mikita Lipski <mikita.lip...@amd.com>

The driver is expecting clock frequency in kHz, while SMU returns
the values in 10kHz, which causes the bandwidth validation to fail

Change-Id: I7b79af18d200fd2157193ee9041c675fe66c391c
Signed-off-by: Mikita Lipski <mikita.lip...@amd.com>
Reviewed-by: Tony Cheng <tony.ch...@amd.com>
Acked-by: Harry Wentland <harry.wentl...@amd.com>
---
 .../amd/display/amdgpu_dm/amdgpu_dm_services.c    | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
index a3b8b295aa27..3b7b74d3cdcf 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c
@@ -275,8 +275,9 @@ static void pp_to_dc_clock_levels_with_latency(
                        DC_DECODE_PP_CLOCK_TYPE(dc_clk_type));
 
        for (i = 0; i < clk_level_info->num_levels; i++) {
-               DRM_DEBUG("DM_PPLIB:\t %d\n", pp_clks->data[i].clocks_in_khz);
-               clk_level_info->data[i].clocks_in_khz = 
pp_clks->data[i].clocks_in_khz;
+               DRM_DEBUG("DM_PPLIB:\t %d in 10kHz\n", 
pp_clks->data[i].clocks_in_khz);
+               /* translate 10kHz to kHz */
+               clk_level_info->data[i].clocks_in_khz = 
pp_clks->data[i].clocks_in_khz * 10;
                clk_level_info->data[i].latency_in_us = 
pp_clks->data[i].latency_in_us;
        }
 }
@@ -302,8 +303,9 @@ static void pp_to_dc_clock_levels_with_voltage(
                        DC_DECODE_PP_CLOCK_TYPE(dc_clk_type));
 
        for (i = 0; i < clk_level_info->num_levels; i++) {
-               DRM_INFO("DM_PPLIB:\t %d\n", pp_clks->data[i].clocks_in_khz);
-               clk_level_info->data[i].clocks_in_khz = 
pp_clks->data[i].clocks_in_khz;
+               DRM_INFO("DM_PPLIB:\t %d in 10kHz\n", 
pp_clks->data[i].clocks_in_khz);
+               /* translate 10kHz to kHz */
+               clk_level_info->data[i].clocks_in_khz = 
pp_clks->data[i].clocks_in_khz * 10;
                clk_level_info->data[i].voltage_in_mv = 
pp_clks->data[i].voltage_in_mv;
        }
 }
@@ -479,8 +481,9 @@ bool dm_pp_get_static_clocks(
                return false;
 
        static_clk_info->max_clocks_state = pp_clk_info.max_clocks_state;
-       static_clk_info->max_mclk_khz = pp_clk_info.max_memory_clock;
-       static_clk_info->max_sclk_khz = pp_clk_info.max_engine_clock;
+       /* translate 10kHz to kHz */
+       static_clk_info->max_mclk_khz = pp_clk_info.max_memory_clock * 10;
+       static_clk_info->max_sclk_khz = pp_clk_info.max_engine_clock * 10;
 
        return true;
 }
-- 
2.17.1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx