[PATCH AUTOSEL 6.0 15/44] drm/admgpu: Skip CG/PG on SOC21 under SRIOV VF

[Sasha Levin]

From: Yifan Zha <yifan....@amd.com>

[ Upstream commit 828418259254863e0af5805bd712284e2bd88e3b ]

[Why]
There is no CG(Clock Gating)/PG(Power Gating) requirement on SRIOV VF.
For multi VF, VF should not enable any CG/PG features.
For one VF, PF will program CG/PG related registers.

[How]
Do not set any cg/pg flag bit at early init under sriov.

Acked-by: Christian König <christian.koe...@amd.com>
Signed-off-by: Yifan Zha <yifan....@amd.com>
Reviewed-by: Hawking Zhang <hawking.zh...@amd.com>
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
Signed-off-by: Sasha Levin <sas...@kernel.org>
---
 drivers/gpu/drm/amd/amdgpu/soc21.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c 
b/drivers/gpu/drm/amd/amdgpu/soc21.c
index 6e564b549b9f..224fd7effd5c 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc21.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc21.c
@@ -583,6 +583,10 @@ static int soc21_common_early_init(void *handle)
                        AMD_PG_SUPPORT_JPEG |
                        AMD_PG_SUPPORT_ATHUB |
                        AMD_PG_SUPPORT_MMHUB;
+               if (amdgpu_sriov_vf(adev)) {
+                       adev->cg_flags = 0;
+                       adev->pg_flags = 0;
+               }
                adev->external_rev_id = adev->rev_id + 0x1; // TODO: need update
                break;
        case IP_VERSION(11, 0, 2):
-- 
2.35.1