From: Daniel Miess <daniel.mi...@amd.com>
[ Upstream commit 17fbdbda9cc87ff5a013898de506212d25323ed7 ]
[Why and How]
Add back debug bits enabling RCO for dcn314 as underflow
associated with this change has been resolved
Acked-by: Stylon Wang <stylon.w...@amd.com>
Signed-off-by: Daniel Miess <daniel.mi...@amd.com>
Reviewed-by: Jun Lei <jun....@amd.com>
Tested-by: Daniel Wheeler <daniel.whee...@amd.com>
Signed-off-by: Alex Deucher <alexander.deuc...@amd.com>
Signed-off-by: Sasha Levin <sas...@kernel.org>
---
.../drm/amd/display/dc/dcn314/dcn314_resource.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
index abeeede38fb39..049fafd3d908c 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
@@ -921,6 +921,22 @@ static const struct dc_debug_options debug_defaults_drv = {
.afmt = true,
}
},
+
+ .root_clock_optimization = {
+ .bits = {
+ .dpp = true,
+ .dsc = false,
+ .hdmistream = false,
+ .hdmichar = false,
+ .dpstream = false,
+ .symclk32_se = false,
+ .symclk32_le = false,
+ .symclk_fe = false,
+ .physymclk = false,
+ .dpiasymclk = false,
+ }
+ },
+
.seamless_boot_odm_combine = true
};
--
2.39.2
