[PATCH v4 2/3] drm/amd/display: Split out checks for applying HPD WA into a separate function

[Mario Limonciello]

This will make it cleaner to read through the logic for an upcoming change.

Signed-off-by: Mario Limonciello <mario.limoncie...@amd.com>
---
Changes from v3->v4:
 * New patch
 .../amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 30 +++++++++++--------
 1 file changed, 18 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c 
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
index fbda42313bfe..20974829f304 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
@@ -120,6 +120,23 @@ static void rn_update_clocks_update_dpp_dto(struct 
clk_mgr_internal *clk_mgr,
        }
 }
 
+static bool check_really_safe_to_lower(struct dc *dc, struct dc_state *context)
+{
+       int display_count = rn_get_active_display_cnt_wa(dc, context);
+       uint32_t hpd_state;
+       int irq_src;
+
+       if (display_count > 0)
+               return false;
+
+       for (irq_src = DC_IRQ_SOURCE_HPD1; irq_src <= DC_IRQ_SOURCE_HPD5; 
irq_src++) {
+               hpd_state = dc_get_hpd_state_dcn21(dc->res_pool->irqs, irq_src);
+               if (hpd_state)
+                       break;
+       }
+
+       return !hpd_state;
+}
 
 static void rn_update_clocks(struct clk_mgr *clk_mgr_base,
                        struct dc_state *context,
@@ -128,12 +145,9 @@ static void rn_update_clocks(struct clk_mgr *clk_mgr_base,
        struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base);
        struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
        struct dc *dc = clk_mgr_base->ctx->dc;
-       int display_count;
-       int irq_src;
        bool update_dppclk = false;
        bool update_dispclk = false;
        bool dpp_clock_lowered = false;
-       uint32_t hpd_state;
 
        struct dmcu *dmcu = clk_mgr_base->ctx->dc->res_pool->dmcu;
 
@@ -148,16 +162,8 @@ static void rn_update_clocks(struct clk_mgr *clk_mgr_base,
                /* check that we're not already in lower */
                if (clk_mgr_base->clks.pwr_state != DCN_PWR_STATE_LOW_POWER) {
 
-                       display_count = rn_get_active_display_cnt_wa(dc, 
context);
-
-                       for (irq_src = DC_IRQ_SOURCE_HPD1; irq_src <= 
DC_IRQ_SOURCE_HPD5; irq_src++) {
-                               hpd_state = 
dc_get_hpd_state_dcn21(dc->res_pool->irqs, irq_src);
-                               if (hpd_state)
-                                       break;
-                       }
-
                        /* if we can go lower, go lower */
-                       if (display_count == 0 && !hpd_state) {
+                       if (check_really_safe_to_lower(dc, context)) {
                                rn_vbios_smu_set_dcn_low_power_state(clk_mgr, 
DCN_PWR_STATE_LOW_POWER);
                                /* update power state */
                                clk_mgr_base->clks.pwr_state = 
DCN_PWR_STATE_LOW_POWER;
-- 
2.25.1