Now, we can use shaper LUT to delinearize and/or normalize the color
space for a more efficient 3D LUT support (so far, only for DRM atomic
color mgmt). If a degamma 1D LUT is passed to linearize the color space,
a custom shaper 1D LUT can be used before applying 3D LUT.
Signed-off-by: Melissa Wen <m...@igalia.com>
---
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 105 +++++++++++++++---
1 file changed, 87 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
index 9777252191b1..b590fc83a88c 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
@@ -352,18 +352,64 @@ static int __set_input_tf(struct dc_transfer_func *func,
return res ? 0 : -ENOMEM;
}
-static int amdgpu_dm_atomic_shaper_lut(struct dc_stream_state *stream,
- struct dc_transfer_func *func_shaper_new)
+static int __set_func_shaper(struct dc_transfer_func *shaper_func,
+ const struct drm_color_lut *lut, uint32_t lut_size)
{
+ struct dc_gamma *gamma = NULL;
+ struct calculate_buffer cal_buffer = {0};
+ bool res;
+
+ ASSERT(lut && lut_size == MAX_COLOR_LUT_ENTRIES);
+
+ cal_buffer.buffer_index = -1;
+
+ gamma = dc_create_gamma();
+ if (!gamma)
+ return -ENOMEM;
+
+ gamma->num_entries = lut_size;
+ __drm_lut_to_dc_gamma(lut, gamma, false);
+
+ /*
+ * Color module doesn't like calculating gamma params
+ * on top of a linear input. But degamma params can be used
+ * instead to simulate this.
+ */
+ gamma->type = GAMMA_CUSTOM;
+ res = mod_color_calculate_degamma_params(NULL, shaper_func, gamma,
true);
+
+ dc_gamma_release(&gamma);
+
+ return res ? 0 : -ENOMEM;
+}
- /* We don't get DRM shaper LUT yet. We assume the input color space is
- * already delinearized, so we don't need a shaper LUT and we can just
- * BYPASS. However, checking dcn30_set_mpc_shaper_3dlut() it seems
+static int amdgpu_dm_atomic_shaper_lut(struct dc_stream_state *stream,
+ struct dc_transfer_func *func_shaper_new,
+ const struct drm_color_lut *shaper_lut,
+ uint32_t shaper_size)
+{
+ /* If no DRM shaper LUT, we assume the input color space is already
+ * delinearized, so we don't need a shaper LUT and we can just BYPASS
+ * However, checking dcn30_set_mpc_shaper_3dlut() it seems
* that setting shaper LUT to BYPASS is not currently supported in the
* DC level, since shaper LUT programming just fails without params.
*/
- func_shaper_new->type = TF_TYPE_BYPASS;
- func_shaper_new->tf = TRANSFER_FUNCTION_LINEAR;
+ if (!shaper_size) {
+ func_shaper_new->type = TF_TYPE_BYPASS;
+ func_shaper_new->tf = TRANSFER_FUNCTION_LINEAR;
+ } else {
+ int r;
+
+ /* If DRM shaper LUT is set, we follow the same behavior of the
+ * atomic regamma and assume a linear base */
+ func_shaper_new->type = TF_TYPE_DISTRIBUTED_POINTS;
+ func_shaper_new->tf = TRANSFER_FUNCTION_LINEAR;
+
+ r = __set_func_shaper(func_shaper_new, shaper_lut,
+ shaper_size);
+ if (r)
+ return r;
+ }
stream->func_shaper = func_shaper_new;
@@ -427,12 +473,27 @@ static uint32_t amdgpu_dm_get_3dlut_size(uint32_t
lut_size,
int amdgpu_dm_verify_3dlut_size(const struct drm_crtc_state *crtc_state,
struct amdgpu_device *adev)
{
- const struct drm_color_lut *lut3d = NULL;
+ const struct drm_color_lut *shaper = NULL, *lut3d = NULL;
uint32_t exp_size, size;
+ /* shaper LUT is only available if 3D LUT color caps*/
+ exp_size = amdgpu_dm_get_3dlut_size(MAX_COLOR_LUT_ENTRIES, adev);
+
+ shaper = __extract_blob_lut(crtc_state->shaper_lut, &size);
+ if (shaper && size != exp_size) {
+ DRM_DEBUG_DRIVER(
+ "Invalid Shaper LUT size. Should be %u but got %u.\n",
+ exp_size, size);
+ return -EINVAL;
+ }
+
exp_size = amdgpu_dm_get_3dlut_size(MAX_COLOR_3DLUT_ENTRIES, adev);
lut3d = __extract_blob_lut(crtc_state->lut3d, &size);
+ /* shaper LUT implies 3D LUT. See dcn30_set_output_transfer_func() */
+ if (shaper && !lut3d)
+ DRM_DEBUG_DRIVER("Shaper LUT is set without 3D LUT.\n");
+
if (lut3d && size != exp_size) {
DRM_DEBUG_DRIVER("Invalid Gamma 3D LUT size. Should be %u but
got %u.\n",
exp_size, size);
@@ -444,6 +505,8 @@ int amdgpu_dm_verify_3dlut_size(const struct drm_crtc_state
*crtc_state,
static int amdgpu_dm_atomic_shaper_3dlut(struct dc *dc,
struct dc_stream_state *stream,
+ const struct drm_color_lut
*drm_shaper_lut,
+ uint32_t drm_shaper_size,
const struct drm_color_lut *drm_lut3d,
uint32_t drm_lut3d_size)
{
@@ -451,7 +514,6 @@ static int amdgpu_dm_atomic_shaper_3dlut(struct dc *dc,
struct dc_transfer_func *shaper_old = (struct dc_transfer_func *)
stream->func_shaper;
struct dc_3dlut *lut3d_new = NULL;
struct dc_transfer_func *shaper_new = NULL;
- int r;
if (lut3d_old && shaper_old) {
if (!dc_acquire_release_mpc_3dlut(dc, false, stream,
@@ -466,15 +528,11 @@ static int amdgpu_dm_atomic_shaper_3dlut(struct dc *dc,
return -EFAULT;
}
- r = amdgpu_dm_atomic_shaper_lut(stream, shaper_new);
- if (r)
- return r;
-
__drm_3dlut_to_dc_3dlut(drm_lut3d, drm_lut3d_size, lut3d_new);
stream->lut3d_func = lut3d_new;
- return 0;
+ return amdgpu_dm_atomic_shaper_lut(stream, shaper_new, drm_shaper_lut,
drm_shaper_size);
}
/**
@@ -542,10 +600,10 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state
*crtc)
bool has_rom = adev->asic_type <= CHIP_RAVEN;
struct drm_color_ctm *ctm = NULL;
const struct drm_color_lut *degamma_lut, *regamma_lut;
- const struct drm_color_lut *lut3d;
+ const struct drm_color_lut *shaper_lut, *lut3d;
uint32_t degamma_size, regamma_size;
- uint32_t lut3d_size;
- bool has_regamma, has_degamma, has_lut3d;
+ uint32_t shaper_size, lut3d_size;
+ bool has_regamma, has_degamma, has_shaper_lut, has_lut3d;
bool is_legacy;
int r;
@@ -558,12 +616,16 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state
*crtc)
return r;
degamma_lut = __extract_blob_lut(crtc->base.degamma_lut, °amma_size);
+ shaper_lut = __extract_blob_lut(crtc->base.shaper_lut, &shaper_size);
lut3d = __extract_blob_lut(crtc->base.lut3d, &lut3d_size);
regamma_lut = __extract_blob_lut(crtc->base.gamma_lut, ®amma_size);
has_degamma =
degamma_lut && !__is_lut_linear(degamma_lut, degamma_size);
+ has_shaper_lut =
+ shaper_lut && !__is_lut_linear(shaper_lut, shaper_size);
+
has_lut3d =
lut3d && !__is_lut_linear(lut3d, lut3d_size);
@@ -605,10 +667,17 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state
*crtc)
return r;
} else {
if (has_lut3d) {
+ /* enable 3D LUT only for DRM atomic regamma */
+ shaper_size = has_shaper_lut ? shaper_size : 0;
+
r = amdgpu_dm_atomic_shaper_3dlut(adev->dm.dc, stream,
+ shaper_lut,
shaper_size,
lut3d, lut3d_size);
- if (r)
+
+ if (r) {
+ DRM_DEBUG_DRIVER("Failed to set shaper and 3D
LUT\n");
return r;
+ }
}
/* Note: OGAM is disabled if 3D LUT is successfully programmed.
* For reference, see params and set_output_gamma in
--
2.35.1
