>From 3348a4bb465834b165de80dc42d11630ac5c6a83 Mon Sep 17 00:00:00 2001
From: Jesse Zhang
Date: Tue, 14 May 2024 13:59:18 +0800
Subject: [PATCH 2/2 v2] drm/amd/pm: check specific index for aldebaran
To avoid warning problems, drop index and
use PPSMC_MSG_GfxDriverReset instead of in
This is in support of a RCCL change that requires specific
coherence behaviour.
Corresponding Thunk patch is at
https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/pull/88
Date: Sat, 11 Mar 2023 19:00:03 +
Subject: [PATCH 5.10 1/1] drm/amdgpu: add error handling for
drm_fb_helper_initial_config
The type of return value of drm_fb_helper_initial_config is int, which may
return wrong result, so we add error handling for it to reclaim memory resource,
and return
his patch is an extension of the commit
> 564d8a2cf3abf16575af48bdc3e86e92ee8a617d
> Subject: [PATCH 3.16 100/192] drm/radeon: Fix eDP for single-display iMac10,1
> (v2)
> Date: Mon, 09 Oct 2017 13:44:24 +0100 [thread overview]
> https://lore.kernel.org/all/lsq.1507553064.833262...@decadent.org.uk/
&
ter radeon.nomodeset=0 required to keep the eDP
panel active.
This patch is an extension of the commit
564d8a2cf3abf16575af48bdc3e86e92ee8a617d
Subject: [PATCH 3.16 100/192] drm/radeon: Fix eDP for single-display
iMac10,1 (v2)
Date: Mon, 09 Oct 2017 13:44:24 +0100 [thread overview]
ht
Date: Thu, 10 Nov 2022 16:47:26 +0300
Subject: [PATCH] drm/amdgpu/display: Add pointer check
Return value of a function 'dc_create_state' is
dereferenced at amdgpu_dm.c:2027 without checking for null
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Signed-off-by: Denis Arefev
add return-value check of ftell to improve robustness(and avoid abnormal
behavior)
Signed-off-by: SPeak
Signed-off-by: shenyanfeng
---
drivers/gpu/drm/radeon/mkregtable.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/mkregtable.c
Hey Alex,
I've decided to split this patch set into two because we still can't
figure out where the VCN regressions come from.
Ruijing tested them and confirmed that they don't regress VCN.
Can you and maybe Felix take a look and review them?
Thanks,
Christian.
[AMD Official Use Only]
Submitting patch to update RAS trigger error to support additional blocks
0002-drm-amdgpu-Update-RAS-trigger-error-block-support.patch
Description: 0002-drm-amdgpu-Update-RAS-trigger-error-block-support.patch
[AMD Official Use Only]
Reviewed-by: Hawking Zhang
Regards,
Hawking
From: Clements, John
Sent: Thursday, September 9, 2021 15:59
To: amd-gfx@lists.freedesktop.org; Zhang, Hawking ; Li,
Candice
Subject: Subject: [PATCH 1/1] drm/amdgpu: Update RAS trigger error block support
[AMD Official
[AMD Official Use Only]
A long time ago, someone reports system got hung during memory test.
In recent days, I am trying to look for or understand the potential
deadlock in ttm/amdgpu code.
This patchset aims to fix the deadlock during ttm populate.
TTM has a parameter called pages_limit, when
including without limitation the
# rights to
# use, copy, modify, merge, publish, distribute, sublicense, and/or sell
# copies of
# the Software, and to permit persons to whom the Software is furnished
# to do so,
# subject to the following conditions:
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# The above copyright notice and this permiss
get 058960
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On 11/9/20 6:52 PM, Joe Perches wrote:
> On Tue, 2020-10-27 at 09:42 -0700, t...@redhat.com wrote:
>> This rfc will describe
>> An upcoming treewide cleanup.
>> How clang tooling was used to programatically do the clean up.
>> Solicit opinions on how to generally use clang tooling.
>>
>> The
On Tue, 2020-10-27 at 09:42 -0700, t...@redhat.com wrote:
> This rfc will describe
> An upcoming treewide cleanup.
> How clang tooling was used to programatically do the clean up.
> Solicit opinions on how to generally use clang tooling.
>
> The clang warning -Wextra-semi-stmt produces about 10k
This rfc will describe
An upcoming treewide cleanup.
How clang tooling was used to programatically do the clean up.
Solicit opinions on how to generally use clang tooling.
The clang warning -Wextra-semi-stmt produces about 10k warnings.
Reviewing these, a subset of semicolon after a switch looks
The series adds SI support to AMD DC
Changelog:
[RFC]
Preliminar Proof Of Concept, with DCE8 headers still used in dce60_resources.c
[PATCH v2]
Rebase on amd-staging-drm-next dated 17-Oct-2018
[PATCH v3]
Add support for DCE6 specific headers,
ad hoc DCE6 macros, funtions and fixes,
rebase on
Use task barrier in XGMI hive to synchronize ASIC resets
across devices in XGMI hive.
v2: Retrun right away with a warning if no xgmi hive, update doc.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 37 +-
1 file changed, 31
, Hawking ; Quan, Evan
; Grodzovsky, Andrey
Subject: [RESEND PATCH 4/5] Subject: drm/amdgpu: Redo XGMI reset
synchronization.
Use task barrier in XGMI hive to synchronize ASIC resets across
devices in XGMI hive.
Signed-off-by: Andrey Grodzovsky <mailto:andrey.grodzov...@amd.com>>
---
, Andrey
Subject: [RESEND PATCH 4/5] Subject: drm/amdgpu: Redo XGMI reset
synchronization.
Use task barrier in XGMI hive to synchronize ASIC resets across devices in XGMI
hive.
Signed-off-by: Andrey Grodzovsky
mailto:andrey.grodzov...@amd.com>>
---
drivers/gpu/drm/amd/
Use task barrier in XGMI hive to synchronize ASIC resets
across devices in XGMI hive.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 42 +-
1 file changed, 36 insertions(+), 6 deletions(-)
diff --git
Use task barrier in XGMI hive to synchronize ASIC resets
across devices in XGMI hive.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 42 +-
1 file changed, 36 insertions(+), 6 deletions(-)
diff --git
Here are the patches to the modesetting driver amended for the amdgpu
driver.
-keith
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Fix bug where GPU_POWER wasn't accessible because we wrote
to *size early...
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