Ack-by: Monk.liu <monk....@amd.com>

_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: amd-gfx <amd-gfx-boun...@lists.freedesktop.org> On Behalf Of Emily Deng
Sent: Thursday, June 11, 2020 10:29 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deng, Emily <emily.d...@amd.com>
Subject: [PATCH] drm/amdgpu/sriov: Add clear vf fw support

Guest VM issue the PSP clear_vf_fw command at 2 points:
1.On VF driver loading, after VF message PSP to setup rings, the next command 
is “clear_vf_fw”
2.On VF driver unload before VF message to destroy rings

Change-Id: Ia31add38a69037d1cbbf9b48ad827fa63b4860f7
Signed-off-by: Emily Deng <emily.d...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 37 +++++++++++++++++++++++++++++++-- 
 drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h |  8 +++++++
 2 files changed, 43 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index cdd65b5..6055849 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -270,8 +270,9 @@ psp_cmd_submit_buf(struct psp_context *psp,
                amdgpu_asic_invalidate_hdp(psp->adev, NULL);
        }
 
-       /* We allow TEE_ERROR_NOT_SUPPORTED for VMR command in SRIOV */
-       skip_unsupport = (psp->cmd_buf_mem->resp.status == 0xffff000a) && 
amdgpu_sriov_vf(psp->adev);
+       /* We allow TEE_ERROR_NOT_SUPPORTED for VMR command and 
PSP_ERR_UNKNOWN_COMMAND in SRIOV */
+       skip_unsupport = (psp->cmd_buf_mem->resp.status == 
TEE_ERROR_NOT_SUPPORTED ||
+               psp->cmd_buf_mem->resp.status == PSP_ERR_UNKNOWN_COMMAND) && 
+amdgpu_sriov_vf(psp->adev);
 
        /* In some cases, psp response status is not 0 even there is no
         * problem while the command is submitted. Some version of PSP FW @@ 
-389,6 +390,26 @@ static int psp_tmr_init(struct psp_context *psp)
        return ret;
 }
 
+static int psp_clear_vf_fw(struct psp_context *psp) {
+       int ret;
+       struct psp_gfx_cmd_resp *cmd;
+
+       if (!amdgpu_sriov_vf(psp->adev) || psp->adev->asic_type != CHIP_NAVI12)
+               return 0;
+
+       cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
+       if (!cmd)
+               return -ENOMEM;
+
+       cmd->cmd_id = GFX_CMD_ID_CLEAR_VF_FW;
+
+       ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);
+       kfree(cmd);
+
+       return ret;
+}
+
 static int psp_tmr_load(struct psp_context *psp)  {
        int ret;
@@ -1382,6 +1403,12 @@ static int psp_hw_start(struct psp_context *psp)
                return ret;
        }
 
+       ret = psp_clear_vf_fw(psp);
+       if (ret) {
+               DRM_ERROR("PSP clear vf fw!\n");
+               return ret;
+       }
+
        ret = psp_tmr_init(psp);
        if (ret) {
                DRM_ERROR("PSP tmr init failed!\n");
@@ -1843,6 +1870,7 @@ static int psp_hw_fini(void *handle)
        struct psp_context *psp = &adev->psp;
        void *tmr_buf;
        void **pptr;
+       int ret;
 
        if (psp->adev->psp.ta_fw) {
                psp_ras_terminate(psp);
@@ -1851,6 +1879,11 @@ static int psp_hw_fini(void *handle)
        }
 
        psp_asd_unload(psp);
+       ret = psp_clear_vf_fw(psp);
+       if (ret) {
+               DRM_ERROR("PSP clear vf fw!\n");
+               return ret;
+       }
 
        psp_ring_destroy(psp, PSP_RING_TYPE__KM);
 
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h 
b/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
index a44fd60..cbc04a5 100644
--- a/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
+++ b/drivers/gpu/drm/amd/amdgpu/psp_gfx_if.h
@@ -110,6 +110,7 @@ enum psp_gfx_cmd_id
     GFX_CMD_ID_SETUP_VMR    = 0x00000009,   /* setup VMR region */
     GFX_CMD_ID_DESTROY_VMR  = 0x0000000A,   /* destroy VMR region */
     GFX_CMD_ID_PROG_REG     = 0x0000000B,   /* program regs */
+    GFX_CMD_ID_CLEAR_VF_FW  = 0x0000000D,   /* Clear VF FW, to be used on VF 
shutdown. */
     /* IDs upto 0x1F are reserved for older programs (Raven, Vega 10/12/20) */
     GFX_CMD_ID_LOAD_TOC     = 0x00000020,   /* Load TOC and obtain TMR size */
     GFX_CMD_ID_AUTOLOAD_RLC = 0x00000021,   /* Indicates all graphics fw 
loaded, start RLC autoload */
@@ -365,4 +366,11 @@ struct psp_gfx_rb_frame
                 /* total 64 bytes */
 };
 
+#define PSP_ERR_UNKNOWN_COMMAND 0x00000100
+
+enum tee_error_code {
+    TEE_SUCCESS                         = 0x00000000,
+    TEE_ERROR_NOT_SUPPORTED             = 0xFFFF000A,
+};
+
 #endif /* _PSP_TEE_GFX_IF_H_ */
--
2.7.4

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