-Original Message-
From: Tao, Yintian
Sent: Wednesday, April 22, 2020 11:47 AM
To: Tao, Yintian ; Liu, Shaoyun ;
Koenig, Christian ; Liu, Monk ;
Kuehling, Felix
Cc: amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH] drm/amdgpu: request reg_val_offs each kiq read reg
Add more
Especially
Sent: Wednesday, April 22, 2020 11:47 AM
To: Tao, Yintian ; Liu, Shaoyun ;
Koenig, Christian ; Liu, Monk ;
Kuehling, Felix
Cc: amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH] drm/amdgpu: request reg_val_offs each kiq read reg
Add more
Especially for the multi-VF environment, we have
; Liu, Monk ; Kuehling, Felix
Cc: amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH] drm/amdgpu: request reg_val_offs each kiq read reg
Hi Shaoyun
No, the second patch can't solve this rare case because only Slot-D is signaled
and the Slot-A can be overwritten.
The second patch think
ing(ring, seq, MAX_KIQ_REG_WAIT);
}
spin_lock_irqrestore(>ring_lock, flags);
Best Regards
Yintian Tao
-Original Message-
From: Liu, Shaoyun
Sent: 2020年4月22日 23:35
To: Tao, Yintian ; Koenig, Christian
; Liu, Monk ; Kuehling, Felix
Cc: amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH] drm/amdgpu: requ
-Original Message-
From: Tao, Yintian
Sent: Wednesday, April 22, 2020 11:00 AM
To: Koenig, Christian ; Liu, Shaoyun
; Liu, Monk ; Kuehling, Felix
Cc: amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH] drm/amdgpu: request reg_val_offs each kiq read reg
Hi Shaoyun
There is one rare corner case
] drm/amdgpu: request reg_val_offs each kiq read reg
Hi Shaoyun,
the ring buffer is usually filled with command and not read results.
Allocating extra space would only work if we use the special NOP command and
that is way more complicated and fragile than just using the wb functions which
where
elix
> Cc: amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH] drm/amdgpu: request reg_val_offs each kiq read
> reg
>
> Am 22.04.20 um 14:36 schrieb Yintian Tao:
>> According to the current kiq read register method, there will be race
>> condition when usin
:52 AM
To: Liu, Shaoyun ; Tao, Yintian ;
Liu, Monk ; Kuehling, Felix
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu: request reg_val_offs each kiq read reg
Hi Shaoyun,
the ring buffer is usually filled with command and not read results.
Allocating extra space would only work
tput value ?
Regards
Shaoyun.liu
-Original Message-
From: amd-gfx On Behalf Of Christian
König
Sent: Wednesday, April 22, 2020 8:42 AM
To: Tao, Yintian ; Liu, Monk ; Kuehling, Felix
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu: request reg_val_offs each kiq
.liu
-Original Message-
From: amd-gfx On Behalf Of Christian
König
Sent: Wednesday, April 22, 2020 8:42 AM
To: Tao, Yintian ; Liu, Monk ; Kuehling,
Felix
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu: request reg_val_offs each kiq read reg
Am 22.04.20 um 14:36 sch
Am 22.04.20 um 14:36 schrieb Yintian Tao:
According to the current kiq read register method,
there will be race condition when using KIQ to read
register if multiple clients want to read at same time
just like the expample below:
1. client-A start to read REG-0 throguh KIQ
2. client-A poll the
11 matches
Mail list logo
