Feng, Kenneth
Subject: Re: [PATCH v2] drm/amd/pm: Ignore initial value in smu response
register
On 7/8/2024 7:01 PM, Danijel Slivka wrote:
> Why:
> If the reg mmMP1_SMN_C2PMSG_90 is being written to during amdgpu
> driver load or driver unload, subsequent amdgpu driver load will fail
> at
On 7/8/2024 7:01 PM, Danijel Slivka wrote:
> Why:
> If the reg mmMP1_SMN_C2PMSG_90 is being written to during amdgpu driver
> load or driver unload, subsequent amdgpu driver load will fail at
> smu_hw_init. The default of mmMP1_SMN_C2PMSG_90 register at a clean
> environment is 0x1 and if value
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Kenneth Feng
-Original Message-
From: amd-gfx On Behalf Of Danijel
Slivka
Sent: Monday, July 8, 2024 9:31 PM
To: amd-gfx@lists.freedesktop.org
Cc: Slivka, Danijel
Subject: [PATCH v2] drm/amd/pm: Ignore initial valu
