On 11/8/2024 4:44 PM, Tao Zhou wrote:
> There are two types of gpu reset, nps mode switch and normal
> gpu reset, add a flag to distigush them.
>
Reset for NPS switch is a subcase of Reset on Initialization scenario
(reset the device before use). If RAS routines need to be taken care for
that
system.
USWC or WB for ring type may still be a separate discussion.
Thanks,
Lijo
> The issue here is not the re-ordering but the stalled PQ.
>
> Monk Liu | Cloud GPU & Virtualization | AMD
>
>
>
> -Original Message-
> From: Liu, Monk
> Sent: Friday, No
[AMD Official Use Only - AMD Internal Distribution Only]
To be clear for the mb() approach: Even if we insert mb() in prior to
amdgpu_ring_set_wptr(ring), GPU might still fetch stalled data from PQ due to
USWC attributes.
The issue here is not the re-ordering but the stalled PQ.
Monk Liu
ling and kicking off doorbell is
> theoretically correct, and I'm not object to do so... but this won't resolve
> the issue we hit.
> First of all, USWC will have some chance that the data is still in CPU's WC
> storage place and not flushed to the memory and eve
t to do so... but this won't resolve
the issue we hit.
First of all, USWC will have some chance that the data is still in CPU's WC
storage place and not flushed to the memory and even with MB() get rid of
re-ordering
GPU might still have a chance to read stalled data from ring buffer as l
On 03/11/2024 17:03, Thomas Weißschuh wrote:
The is_bin_visible() callbacks should not modify the struct
bin_attribute passed as argument.
Enforce this by marking the argument as const.
As there are not many callback implementers perform this change
throughout the tree at once.
Signed-off-by
On 03/11/2024 17:03, Thomas Weißschuh wrote:
Stop abusing the is_bin_visible() callback to calculate the attribute
size. Instead use the new, dedicated bin_size() one.
Signed-off-by: Thomas Weißschuh
---
Thanks for the patch,
LGTM.
Acked-by: Srinivas Kandagatla
--srini
drivers/nvmem
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Lijo,
-Original Message-
From: Lazar, Lijo
Sent: Friday, November 8, 2024 5:24 PM
To: Zhang, Jesse(Jie) ; Koenig, Christian
; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Prosyak, Vitaly
; Huang, Tim
Subject: Re
: Re: [PATCH] drm/amdkfd: correct the SVM DMA device unmap direction
Am 05.11.24 um 17:34 schrieb Felix Kuehling:
On 2024-11-05 06:04, Christian König wrote:
Am 05.11.24 um 03:33 schrieb Prike Liang:
The SVM DMA device unmap direction should be same as the DMA map
process.
At least of hand that
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Christian,
-Original Message-
From: Koenig, Christian
Sent: Friday, November 8, 2024 3:51 PM
To: Zhang, Jesse(Jie) ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Prosyak, Vitaly
; Huang, Tim
Subject: Re: [PATCH] drm
vember 8, 2024 3:51 PM
> To: Zhang, Jesse(Jie) ; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Prosyak, Vitaly
> ; Huang, Tim
> Subject: Re: [PATCH] drm/amdgpu: fix warning when removing sysfs
>
> Am 08.11.24 um 03:21 schrieb jesse.zh...@amd.com:
>> Fix similar wa
[AMD Official Use Only - AMD Internal Distribution Only]
> From: Koenig, Christian
> Sent: Wednesday, November 6, 2024 8:24 PM
> To: Kuehling, Felix ; Liang, Prike
> ; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Kasiviswanathan, Harish
>
> Subject: Re: [PATCH
Hi,
在 2024/11/07 22:41, Chuck Lever 写道:
On Thu, Nov 07, 2024 at 08:57:23AM +0800, Yu Kuai wrote:
Hi,
在 2024/11/06 23:19, Chuck Lever III 写道:
On Nov 6, 2024, at 1:16 AM, Greg KH wrote:
On Thu, Oct 24, 2024 at 09:19:41PM +0800, Yu Kuai wrote:
From: Yu Kuai
Fix patch is patch 27, relied
On Thu, Nov 07, 2024 at 08:57:23AM +0800, Yu Kuai wrote:
> Hi,
>
> 在 2024/11/06 23:19, Chuck Lever III 写道:
> >
> >
> > > On Nov 6, 2024, at 1:16 AM, Greg KH wrote:
> > >
> > > On Thu, Oct 24, 2024 at 09:19:41PM +0800, Yu Kuai wrote:
> > > > From: Yu Kuai
> > > >
> > > > Fix patch is patch 27
On Fri, Nov 08, 2024 at 11:41:18AM +0300, Fedor Pchelkin wrote:
> On Tue, 05. Nov 07:57, Greg Kroah-Hartman wrote:
> > On Mon, Nov 04, 2024 at 05:55:28PM +0300, Fedor Pchelkin wrote:
> > > It is just strange that the (exact same) change made by the commits is
> > > duplicated by backporting tools.
On 07/11/2024 14:24, Li, Yunxiang (Teddy) wrote:
[Public]
From: Tvrtko Ursulin
Sent: Thursday, November 7, 2024 5:48
On 31/10/2024 13:48, Li, Yunxiang (Teddy) wrote:
[Public]
From: Christian König
Sent: Thursday, October 31, 2024 8:54 Am 25.10.24 um 19:41 schrieb
Yunxiang Li:
Before, ev
On 07/11/2024 14:17, Li, Yunxiang (Teddy) wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
From: Tvrtko Ursulin
Sent: Thursday, November 7, 2024 5:41
On 25/10/2024 18:41, Yunxiang Li wrote:
Add a helper to check if the memory stats is zero, this will be used
to check for memo
* Yu Kuai [241106 19:57]:
> Hi,
>
> 在 2024/11/06 23:19, Chuck Lever III 写道:
> >
> >
> > > On Nov 6, 2024, at 1:16 AM, Greg KH wrote:
> > >
> > > On Thu, Oct 24, 2024 at 09:19:41PM +0800, Yu Kuai wrote:
> > > > From: Yu Kuai
> > > >
> > > > Fix patch is patch 27, relied patches are from:
> >
On Tue, 05. Nov 07:57, Greg Kroah-Hartman wrote:
> On Mon, Nov 04, 2024 at 05:55:28PM +0300, Fedor Pchelkin wrote:
> > It is just strange that the (exact same) change made by the commits is
> > duplicated by backporting tools. As it is not the first case where DRM
> > patches are involved per Greg'
Am 08.11.24 um 03:21 schrieb jesse.zh...@amd.com:
Fix similar warning when running IGT:
[ 155.585721] kernfs: can not remove 'enforce_isolation', no directory
[ 155.592201] WARNING: CPU: 3 PID: 6960 at fs/kernfs/dir.c:1683
kernfs_remove_by_name_ns+0xb9/0xc0
[ 155.601145] Modules linked in: x
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Jesse,
> -Original Message-
> From: jesse.zh...@amd.com
> Sent: Friday, November 8, 2024 10:22 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Prosyak, Vitaly ;
> Huang, Tim ; Zhang, Jesse
[Public]
Reviewed-by: Alex Deucher
From: SHANMUGAM, SRINIVASAN
Sent: Thursday, November 7, 2024 2:59 PM
To: Koenig, Christian ; Deucher, Alexander
Cc: amd-gfx@lists.freedesktop.org ; SHANMUGAM,
SRINIVASAN ; Kamal, Asad
Subject: [PATCH] drm/amdgpu: Add documen
Am 07.11.24 um 15:43 schrieb Tvrtko Ursulin:
On 07/11/2024 14:17, Li, Yunxiang (Teddy) wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
From: Tvrtko Ursulin
Sent: Thursday, November 7, 2024 5:41
On 25/10/2024 18:41, Yunxiang Li wrote:
Add a helper to check if the memory stats
On Thu, Nov 7, 2024 at 3:03 AM Kenneth Topp wrote:
>
> Greetings,
>
> I'm getting no-retry page fault fatal errors (kills Xwayland):
>
> [ 177.470230 <6.102062 >] myhost kernel: amdgpu :03:00.0:
> amdgpu: [gfxhub0] no-retry page fault (src_id:0 ring:158 vmid:3
> pasid:32776)
> [ 177.4704
On Sun, Nov 03 2024, Thomas Weißschuh wrote:
> The is_bin_visible() callbacks should not modify the struct
> bin_attribute passed as argument.
> Enforce this by marking the argument as const.
>
> As there are not many callback implementers perform this change
> throughout the tree at once.
>
> Sig
On 25/10/2024 18:41, Yunxiang Li wrote:
Add a helper to check if the memory stats is zero, this will be used to
check for memory accounting errors.
Signed-off-by: Yunxiang Li
---
drivers/gpu/drm/drm_file.c | 9 +
include/drm/drm_file.h | 1 +
2 files changed, 10 insertions(+)
[Public]
> From: Tvrtko Ursulin
> Sent: Thursday, November 7, 2024 5:48
> On 31/10/2024 13:48, Li, Yunxiang (Teddy) wrote:
> > [Public]
> >
> >> From: Christian König
> >> Sent: Thursday, October 31, 2024 8:54 Am 25.10.24 um 19:41 schrieb
> >> Yunxiang Li:
> >>> Before, every time fdinfo is quer
Hi Fangzhi,
kernel test robot noticed the following build warnings:
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/Fangzhi-Zuo/drm-display-dsc-Refactor-DRM-MST-DSC-Determination-Policy/20241106-230854
base: git://anongi
agree as well. The barrier also takes care of
preventing the compiler from re-ordering writes.
Regards,
Christian.
Thanks,
Lijo
Alex
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/dr
[AMD Official Use Only - AMD Internal Distribution Only]
> From: Tvrtko Ursulin
> Sent: Thursday, November 7, 2024 5:41
> On 25/10/2024 18:41, Yunxiang Li wrote:
> > Add a helper to check if the memory stats is zero, this will be used
> > to check for memory accounting errors.
> >
> > Signed-off-
On Sun, Nov 03, 2024 at 05:03:32PM +, Thomas Weißschuh wrote:
> Stop abusing the is_bin_visible() callback to calculate the attribute
> size. Instead use the new, dedicated bin_size() one.
>
> Signed-off-by: Thomas Weißschuh
Acked-by: Bjorn Helgaas
Thanks for doing this!
> ---
> drivers/
Hello,
[...]
> > There exist the sysfs_update_groups(), but the BAR resource sysfs objects
> > are currently, at least not yet, added to any attribute group.
>
> then maybe they should be added to one :)
Yeah. There is work in progress that will take care of some of this.
Krzysztof
On 31/10/2024 13:48, Li, Yunxiang (Teddy) wrote:
[Public]
From: Christian König
Sent: Thursday, October 31, 2024 8:54
Am 25.10.24 um 19:41 schrieb Yunxiang Li:
Before, every time fdinfo is queried we try to lock all the BOs in the
VM and calculate memory usage from scratch. This works okay
[AMD Official Use Only - AMD Internal Distribution Only]
For amdgpu_ras_block_to_sriov, can we return block directly? As the definition
of enum amdgpu_ras_block is same as that of enum
amd_sriov_ras_telemetry_gpu_block.
Anyway, the framework is fine for me, the series is:
Acked-by: Tao Zhou
>
On 11/5/2024 5:49 AM, Felix Kuehling wrote:
> On 2024-10-31 23:20, Zhu Lingshan wrote:
>> On 10/22/2024 4:01 PM, Zhu Lingshan wrote:
>>> On 10/22/2024 12:20 PM, Felix Kuehling wrote:
On 2024-10-14 23:51, Zhu Lingshan wrote:
> This commit specifies data type struct amdkfd_process_info
>
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Xiao, Jack
Sent: Thursday, November 7, 2024 15:39
To: amd-gfx@lists.freedesktop.org; Deucher, Alexander
; Zhang, Hawking
Cc: Xiao, Jack
Subject: [PATCH] drm/a
On Thu, Oct 24, 2024 at 09:22:25PM +0800, Yu Kuai wrote:
> diff --git a/lib/maple_tree.c b/lib/maple_tree.c
> index 5328e08723d7..c57b6fc4db2e 100644
> --- a/lib/maple_tree.c
> +++ b/lib/maple_tree.c
> @@ -2239,6 +2239,8 @@ static inline void mas_node_or_none(struct ma_state
> *mas,
>
> /*
> *
ndrew Morton (1):
lib/maple_tree.c: fix build error due to hotfix alteration
Chuck Lever (5):
libfs: Re-arrange locking in offset_iterate_dir()
libfs: Define a minimum directory offset
libfs: Add simple_offset_empty()
maple_tree: Add mtree_alloc_cyclic()
libfs: Convert simple
ll/170820083431.6328.16233178852085891453.st...@91.116.238.104.host.secureserver.net/
>
> Andrew Morton (1):
> lib/maple_tree.c: fix build error due to hotfix alteration
>
> Chuck Lever (5):
> libfs: Re-arrange locking in offset_iterate_dir()
> libfs: Define a minimum di
* Greg KH [241106 01:16]:
> On Thu, Oct 24, 2024 at 09:19:41PM +0800, Yu Kuai wrote:
> > From: Yu Kuai
> >
> > Fix patch is patch 27, relied patches are from:
> >
> > - patches from set [1] to add helpers to maple_tree, the last patch to
> > improve fork() performance is not backported;
>
> S
On Wed, 2024-11-06 at 15:19 +, Chuck Lever III wrote:
> This is the first I've heard of this CVE. It
> would help if the patch authors got some
> notification when these are filed.
Greg did it; it came from the kernel CNA:
https://www.cve.org/CVERecord?id=CVE-2024-46701
The way it seems to w
Hi,
在 2024/11/06 23:02, Lorenzo Stoakes 写道:
On Thu, Oct 24, 2024 at 09:22:25PM +0800, Yu Kuai wrote:
diff --git a/lib/maple_tree.c b/lib/maple_tree.c
index 5328e08723d7..c57b6fc4db2e 100644
--- a/lib/maple_tree.c
+++ b/lib/maple_tree.c
@@ -2239,6 +2239,8 @@ static inline void mas_node_or_none(
> On Nov 6, 2024, at 1:16 AM, Greg KH wrote:
>
> On Thu, Oct 24, 2024 at 09:19:41PM +0800, Yu Kuai wrote:
>> From: Yu Kuai
>>
>> Fix patch is patch 27, relied patches are from:
I assume patch 27 is:
libfs: fix infinite directory reads for offset dir
https://lore.kernel.org/stable/202410241
Hi,
在 2024/11/06 23:19, Chuck Lever III 写道:
On Nov 6, 2024, at 1:16 AM, Greg KH wrote:
On Thu, Oct 24, 2024 at 09:19:41PM +0800, Yu Kuai wrote:
From: Yu Kuai
Fix patch is patch 27, relied patches are from:
I assume patch 27 is:
libfs: fix infinite directory reads for offset dir
https
On 11/6/2024 12:34 AM, Victor Skvortsov wrote:
> Enable RAS late init if VF RAS Telemetry is supported.
>
> When enabled, the VF can use this interface to query total
> RAS error counts from the host.
>
> The VF FB access may abruptly end due to a fatal error,
> therefore the VF must cache an
On 11/6/2024 8:42 PM, Alex Deucher wrote:
> On Wed, Nov 6, 2024 at 1:49 AM Victor Zhao wrote:
>>
>> From: Monk Liu
>>
>> As cache GTT buffer is snooped, this way the coherence between CPU write
>> and GPU fetch is guaranteed, but original code uses WC + unsnooped for
>> HIQ PQ(ring buffer) whi
ck to calculate the size of the
> > attribute.
>
> Would it be possible to have a helper that when run against a specific
> kobject reference, then it would refresh or re-run the size callbacks?
>
> We have an use case where we resize BARs on demand via sysfs, and currently
>
On 2024/11/6 23:50, Christian König wrote:
> Am 06.11.24 um 04:20 schrieb Chen, Jiqian:
>> On 2024/11/5 21:42, Christian König wrote:
>>> Am 05.11.24 um 07:05 schrieb Jiqian Chen:
VPCI of Xen doesn't support resizable bar. When discrete GPU is used on
PVH dom0 which using the VPCI, amdgpu
On 2024-11-06 17:54, Ramesh Errabolu wrote:
> Raise an info message in kernel log if PCIe root complex
> determines that a AMD GPU device D cannot have P2P
> communication with another AMD GPU device D
>
> Signed-off-by: Ramesh Errabolu
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++
,
Ramesh
-Original Message-
From: Kuehling, Felix
Sent: Wednesday, November 6, 2024 3:50 PM
To: Errabolu, Ramesh ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2] drm/amdgpu: Inform if PCIe based P2P links are not
available
On 2024-11-05 20:19, Ramesh Errabolu wrote:
> Raise
On 2024-11-05 20:19, Ramesh Errabolu wrote:
> Raise an info message in kernel log if PCIe root complex
> determines that a AMD GPU device D cannot have P2P
> communication with another AMD GPU device D
>
> Signed-off-by: Ramesh Errabolu
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++
On 2024-11-05 20:35, Yuan Can wrote:
> In kfd_procfs_show(), the sdma_activity_work_handler is a local variable
> and the sdma_activity_work_handler.sdma_activity_work should initialize
> with INIT_WORK_ONSTACK() instead of INIT_WORK().
>
> Fixes: 32cb59f31362 ("drm/amdkfd: Track SDMA utilization
associate with.
Cc: sta...@vger.kernel.org # 6.11+
Fixes: be64336307a6c ("drm/amd/display: Re-enable panel replay feature")
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3686
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3682
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_
tiple times, overwriting the
> shared size field.
> * It prevents the structure to be moved to read-only memory.
>
> Introduce a new dedicated callback to calculate the size of the
> attribute.
Would it be possible to have a helper that when run against a specific
kobject referen
Am 03.11.24 um 18:03 schrieb Thomas Weißschuh:
Several drivers need to dynamically calculate the size of an binary
attribute. Currently this is done by assigning attr->size from the
is_bin_visible() callback.
Hi,
i really like your idea of introducing this new callback, it will be very
useful
On 11/5/2024 6:31 PM, Felix Kuehling wrote:
On 2024-10-28 17:40, Xiaogang.Chen wrote:
From: Xiaogang Chen
To allow user better understand the cause triggering runlist
oversubscription.
No function change.
Signed-off-by: Xiaogang Chen xiaogang.c...@amd.com
---
.../gpu/drm/amd/amdkfd/kfd
Reviewed-by: Amber Lin
Regards,
Amber
On 2024-11-06 11:08, Amber Lin wrote:
From: Max Erenberg
These options are necessary to use virtio devices with QEMU.
Signed-off-by: Max Erenberg
---
arch/x86/configs/rock-dbg_defconfig | 14 ++
1 file changed, 14 insertions(+)
diff --g
On Wed, Nov 6, 2024 at 3:18 AM Zicheng Qu wrote:
>
> The current implementation incorrectly updates DOMAIN10_PG_CONFIG with
> DOMAIN8_POWER_FORCEON, which is not the intended behavior. This patch
> corrects the power gating configuration by updating DOMAIN10_PG_CONFIG
> with DOMAIN10_POWER_FORCEON
Am 06.11.24 um 04:20 schrieb Chen, Jiqian:
On 2024/11/5 21:42, Christian König wrote:
Am 05.11.24 um 07:05 schrieb Jiqian Chen:
VPCI of Xen doesn't support resizable bar. When discrete GPU is used on
PVH dom0 which using the VPCI, amdgpu fails to probe, so we need to
disable this capability for
Reviewed-by: Boyuan Zhang
On 2024-11-05 21:09, Srinivasan Shanmugam wrote:
This commit corrects the descriptors for the
vcn_v4_0/v4_0_3/v4_0_5/v5_0_0 _set_clockgating_state and
vcn_v4_0/v4_0_3/v4_0_5/v5_0_0 _set_powergating_state functions in the
amdgpu driver.
The parameter descriptors in the
Reviewed-by: Boyuan Zhang
On 2024-11-05 21:16, Srinivasan Shanmugam wrote:
This commit adds the missing kdoc parameter descriptor for 'inst' in the
smu_dpm_set_power_gate function.
The 'inst' parameter, which specifies the instance of the IP block to
power gate/ungate.
Fixes the below with gc
On Wed, Nov 6, 2024 at 3:24 AM Zicheng Qu wrote:
>
> The current implementation incorrectly updates DOMAIN11_PG_CONFIG with
> DOMAIN9_POWER_FORCEON, which is not the intended behavior. This patch
> corrects the power gating configuration by updating DOMAIN11_PG_CONFIG
> with DOMAIN11_POWER_FORCEON
On Wed, Nov 6, 2024 at 1:49 AM Victor Zhao wrote:
>
> From: Monk Liu
>
> As cache GTT buffer is snooped, this way the coherence between CPU write
> and GPU fetch is guaranteed, but original code uses WC + unsnooped for
> HIQ PQ(ring buffer) which introduces coherency issues:
> MEC fetches a stall
On Wed, Nov 6, 2024 at 1:49 AM Victor Zhao wrote:
>
> From: Gang Ba
>
> amdgpu_amdkfd_alloc_gtt_mem currently allocates USWC memory.
> It uses write-combining for CPU access, which is slow for reading.
> Add a new parameter to amdgpu_amdkfd_alloc_gtt_mem to allocate
> normal GTT memory.
>
> Signe
Am 05.11.24 um 17:34 schrieb Felix Kuehling:
On 2024-11-05 06:04, Christian König wrote:
Am 05.11.24 um 03:33 schrieb Prike Liang:
The SVM DMA device unmap direction should be same as
the DMA map process.
At least of hand that looks like it's only papering over a major
problem.
Why are DMA
On Tue, Nov 5, 2024 at 9:19 PM Srinivasan Shanmugam
wrote:
>
> This commit adds the cleaner shader microcode for GFX10.3.0 GPUs. The
> cleaner shader is a piece of GPU code that is used to clear or
> initialize certain GPU resources, such as Local Data Share (LDS), Vector
> General Purpose Registe
On Thu, Oct 24, 2024 at 09:19:41PM +0800, Yu Kuai wrote:
> From: Yu Kuai
>
> Fix patch is patch 27, relied patches are from:
>
> - patches from set [1] to add helpers to maple_tree, the last patch to
> improve fork() performance is not backported;
So things slowed down?
> - patches from set
Am Di., 5. Nov. 2024 um 16:16 Uhr schrieb Matias N. Goldberg
:
>
> > That's not a problem, incompatible options can just be rejected in atomic
> > tests.
>
> I was thinking from a user perspective. It'd be easier for user-space config
> apps to present only the valid options, rather than offering
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Tao Zhou
> -Original Message-
> From: Wang, Yang(Kevin)
> Sent: Wednesday, November 6, 2024 2:59 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking ; Zhou1, Tao
> ; Chai, Thomas
> Subject: [PATCH] drm/amdgpu
On Tue Nov 5, 2024 at 2:51 AM PST, Dmitry Baryshkov wrote:
> On Tue, 5 Nov 2024 at 10:15, Christopher Snowhill wrote:
> >
> > On Mon Nov 4, 2024 at 12:52 PM PST, André Almeida wrote:
> > > Hi Christopher,
> > >
> > > Em 03/11/2024 03:36, Christopher Snowhill escreveu:
> > > > On Fri Nov 1, 2024 at
On 2024/11/5 21:42, Christian König wrote:
> Am 05.11.24 um 07:05 schrieb Jiqian Chen:
>> VPCI of Xen doesn't support resizable bar. When discrete GPU is used on
>> PVH dom0 which using the VPCI, amdgpu fails to probe, so we need to
>> disable this capability for PVH dom0.
>
> What do you mean VPC
On 2024-10-28 17:40, Xiaogang.Chen wrote:
From: Xiaogang Chen
To allow user better understand the cause triggering runlist oversubscription.
No function change.
Signed-off-by: Xiaogang Chen xiaogang.c...@amd.com
---
.../gpu/drm/amd/amdkfd/kfd_packet_manager.c | 55 ++-
1
On 2024-10-28 16:43, Xiaogang.Chen wrote:
From: Xiaogang Chen
kfd process kref count(process->ref) is initialized to 1 by kref_init. After
it is created not need to increase its kref. Instad add kfd process kref at kfd
process mmu notifier allocation since we already decrease the kref at
free
On 05/11/2024 15:06, Alex Deucher wrote:
This builds on the patches from Lu and Jocelyn to fill in
panic support for all DCE/DCN variants and code pathes.
v2: refactor to provide cleaner history and share more
code to provide a more consistent experience across
DC and non-DC.
v3: resend with th
ping
On 10/28/2024 3:43 PM, Xiaogang.Chen wrote:
From: Xiaogang Chen
kfd process kref count(process->ref) is initialized to 1 by kref_init. After
it is created not need to increase its kref. Instad add kfd process kref at kfd
process mmu notifier allocation since we already decrease the kref a
On 11/5/24 7:02 AM, Zicheng Qu wrote:
Hi all,
I am submitting two patches to correct power gating configurations in
the AMD display driver.
1. Patch 1/2 (Fixes: 46825fcfbe16): Corrects DOMAIN10_PG_CONFIG to use
DOMAIN10_POWER_FORCEON.
2. Patch 2/2 (Fixes: 46825fcfbe16): Corrects DOMAIN11_PG_
[Public]
Reviewed-by: David Belanger
> -Original Message-
> From: Kim, Jonathan
> Sent: Tuesday, November 5, 2024 1:46 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Belanger, David ; Kim, Jonathan
>
> Subject: [PATCH] drm/amdkfd: remove gfx 12 trap handler page size cap
>
> GFX 12 does
[Public]
Instead of removing the check entirely, I think it should be changed to:
BUILD_BUG_ON(sizeof(cwsr_trap_gfx12_hex) > KFD_CWSR_TMA_OFFSET);
Like the pre-GFX11 cases. A cwsr trap handler too large will overwrite the
TMA area.
Regards,
David B.
> -Original Message-
> From: Kim, J
Hi Jiqian,
kernel test robot noticed the following build errors:
[auto build test ERROR on linus/master]
[also build test ERROR on v6.12-rc6 next-20241105]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented i
On 2024-11-05 06:04, Christian König wrote:
Am 05.11.24 um 03:33 schrieb Prike Liang:
The SVM DMA device unmap direction should be same as
the DMA map process.
At least of hand that looks like it's only papering over a major problem.
Why are DMA ranges for SVM mapped with a direction in the f
On Sun, Nov 03, 2024 at 05:03:29PM +, Thomas Weißschuh wrote:
> struct bin_attribute contains a bunch of pointer members, which when
> overwritten by accident or malice can lead to system instability and
> security problems.
> Moving the definitions of struct bin_attribute to read-only memory
>
On Sun, Nov 03, 2024 at 05:03:31PM +, Thomas Weißschuh wrote:
> Several drivers need to dynamically calculate the size of an binary
> attribute. Currently this is done by assigning attr->size from the
> is_bin_visible() callback.
s/an binary/a binary/
> This has drawbacks:
> * It is not docum
On Sun, Nov 03, 2024 at 05:03:34PM +, Thomas Weißschuh wrote:
> The is_bin_visible() callbacks should not modify the struct
> bin_attribute passed as argument.
> Enforce this by marking the argument as const.
>
> As there are not many callback implementers perform this change
> throughout the
> That's not a problem, incompatible options can just be rejected in atomic
> tests.
I was thinking from a user perspective. It'd be easier for user-space config
apps to present only the valid options, rather than offering all possible
combinations only to reject them after the user selected an
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Kamal, Asad
Sent: Tuesday, November 5, 2024 20:34
To: amd-gfx@lists.freedesktop.org; Lazar, Lijo ; Zhang,
Hawking
Cc: Ma, Le ; Zhang, Morris ; Kamal, Asad
;
Am 05.11.24 um 10:24 schrieb Chong Li:
The currect code use the address "adev->mes.read_val_ptr" to
store the value read from register via mes.
So when multiple threads read register,
multiple threads have to share the one address,
and overwrite the value each other.
Assign an address by "amdgpu
On Tue, Nov 5, 2024 at 4:39 AM Chong Li wrote:
>
> The currect code use the address "adev->mes.read_val_ptr" to
> store the value read from register via mes.
> So when multiple threads read register,
> multiple threads have to share the one address,
> and overwrite the value each other.
>
> Assign
On Tue, Nov 5, 2024 at 8:59 AM Jocelyn Falempe wrote:
>
> On 31/10/2024 19:04, Alex Deucher wrote:
> > This builds on the patches from Lu and Jocelyn to fill in
> > panic support for all DCE/DCN variants and code pathes.
> >
> > v2: refactor to provide cleaner history and share more
> > code to pr
On Mon, Nov 04, 2024 at 05:55:28PM +0300, Fedor Pchelkin wrote:
> On Tue, 29. Oct 18:12, Fedor Pchelkin wrote:
> > On Tue, 29. Oct 10:20, Sasha Levin wrote:
> > > On Tue, Oct 29, 2024 at 04:31:40PM +0300, Fedor Pchelkin wrote:
> > > > BTW, a question to the stable-team: what Git magic (3-way-merge?
On Tue, 29. Oct 18:12, Fedor Pchelkin wrote:
> On Tue, 29. Oct 10:20, Sasha Levin wrote:
> > On Tue, Oct 29, 2024 at 04:31:40PM +0300, Fedor Pchelkin wrote:
> > > BTW, a question to the stable-team: what Git magic (3-way-merge?) let the
> > > duplicate patch be applied successfully? The patch conte
Am Mo., 28. Okt. 2024 um 16:18 Uhr schrieb Matias N. Goldberg
:
>
> SENDING AGAIN because it was sent with HTML formatting, which screwed up the
> email.
>
>
> Hi!
>
> This is my first patch ever to DRM/amdgpu (technically I didn't write the
> patch, I just kept rebasing it over 4 years, and did
On 31/10/2024 19:04, Alex Deucher wrote:
This builds on the patches from Lu and Jocelyn to fill in
panic support for all DCE/DCN variants and code pathes.
v2: refactor to provide cleaner history and share more
code to provide a more consistent experience across
DC and non-DC.
I wasn't able to
Am 05.11.24 um 07:05 schrieb Jiqian Chen:
VPCI of Xen doesn't support resizable bar. When discrete GPU is used on
PVH dom0 which using the VPCI, amdgpu fails to probe, so we need to
disable this capability for PVH dom0.
What do you mean VPCI doesn't support resizeable BAR?
This is mandatory to
Hi Jiqian,
kernel test robot noticed the following build errors:
[auto build test ERROR on linus/master]
[also build test ERROR on v6.12-rc6 next-20241105]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented i
Am 05.11.24 um 03:33 schrieb Prike Liang:
The SVM DMA device unmap direction should be same as
the DMA map process.
At least of hand that looks like it's only papering over a major problem.
Why are DMA ranges for SVM mapped with a direction in the first place?
That is usually not something we
On 11/5/2024 4:22 PM, Asad Kamal wrote:
> Add sysfs node to show supported NPS mode for the
> partition configuration selected using xcp_config
>
> v2: Hide node if dynamic nps switch not supported
>
> Signed-off-by: Asad Kamal
> Reviewed-by: Lijo Lazar
> ---
> drivers/gpu/drm/amd/amdgpu/am
On Tue, 5 Nov 2024 at 10:15, Christopher Snowhill wrote:
>
> On Mon Nov 4, 2024 at 12:52 PM PST, André Almeida wrote:
> > Hi Christopher,
> >
> > Em 03/11/2024 03:36, Christopher Snowhill escreveu:
> > > On Fri Nov 1, 2024 at 11:23 AM PDT, André Almeida wrote:
> > >> Currently, DRM atomic uAPI all
On 11/5/2024 2:13 AM, Felix Kuehling wrote:
>
> On 2024-10-31 22:15, Zhu Lingshan wrote:
>> On 10/31/2024 11:27 PM, Felix Kuehling wrote:
>>> On 2024-10-31 6:47, Zhu Lingshan wrote:
The header usr/linux/kfd_ioctl.h is a duplicate of uapi/linux/kfd_ioctl.h.
>>> I don't see usr/linux/kfd_ioc
On Mon Nov 4, 2024 at 12:52 PM PST, André Almeida wrote:
> Hi Christopher,
>
> Em 03/11/2024 03:36, Christopher Snowhill escreveu:
> > On Fri Nov 1, 2024 at 11:23 AM PDT, André Almeida wrote:
> >> Currently, DRM atomic uAPI allows only primary planes to be flipped
> >> asynchronously. However, each
On 11/5/2024 4:43 AM, Felix Kuehling wrote:
> On 2024-10-31 22:15, Zhu Lingshan wrote:
>> On 10/31/2024 11:27 PM, Felix Kuehling wrote:
>>> On 2024-10-31 6:47, Zhu Lingshan wrote:
The header usr/linux/kfd_ioctl.h is a duplicate of uapi/linux/kfd_ioctl.h.
>>> I don't see usr/linux/kfd_ioctl.h.
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