Date: Saturday, March 12, 2022 @ 12:04:53 Author: foutrelis Revision: 439467
upgpkg: llvm 13.0.1-2: backport miscompilation fix Fixes test failures in rav1e. (Fix discovered by arojas.) Added: llvm/trunk/don-t-move-DBG_VALUE-instructions.patch Modified: llvm/trunk/PKGBUILD -----------------------------------------+ PKGBUILD | 8 ++ don-t-move-DBG_VALUE-instructions.patch | 91 ++++++++++++++++++++++++++++++ 2 files changed, 98 insertions(+), 1 deletion(-) Modified: PKGBUILD =================================================================== --- PKGBUILD 2022-03-12 11:07:29 UTC (rev 439466) +++ PKGBUILD 2022-03-12 12:04:53 UTC (rev 439467) @@ -3,7 +3,7 @@ pkgname=('llvm' 'llvm-libs' 'llvm-ocaml') pkgver=13.0.1 -pkgrel=1 +pkgrel=2 _ocaml_ver=4.13.1 arch=('x86_64') url="https://llvm.org/" @@ -16,6 +16,7 @@ _source_base=https://github.com/llvm/llvm-project/releases/download/llvmorg-$pkgver source=($_source_base/$pkgname-$pkgver.src.tar.xz{,.sig} don-t-accept-nullptr-as-GEP-element-type.patch + don-t-move-DBG_VALUE-instructions.patch no-strict-aliasing-DwarfCompileUnit.patch disable-bswap-for-spir.patch llvm-config.h) @@ -22,6 +23,7 @@ sha256sums=('ec6b80d82c384acad2dc192903a6cf2cdbaffb889b84bfb98da9d71e630fc834' 'SKIP' 'a7e902a7612d0fdabe436a917468b043cc296bc89d8954bfc3126f737beb9ac4' + 'f7d69f84241416398fdb3df8bb44f9fae3c49d89889c7ffa3b37aa2e9d78f708' 'd1eff24508e35aae6c26a943dbaa3ef5acb60a145b008fd1ef9ac6f6c4faa662' 'af163392fbc19d65d11ab4b1510a2eae39b417d6228023b3ba5395b138bb41f5' '597dc5968c695bbdbb0eac9e8eb5117fcd2773bc91edf5ec103ecffffab8bc48') @@ -35,6 +37,10 @@ # https://github.com/intel/intel-graphics-compiler/issues/204 patch -Rp2 -i ../don-t-accept-nullptr-as-GEP-element-type.patch + # https://github.com/llvm/llvm-project/issues/53243 + # https://github.com/rust-lang/rust/issues/92869 + patch -Np2 -i ../don-t-move-DBG_VALUE-instructions.patch + # Work around intermittent 'clang -O -g' crashes # https://bugs.llvm.org/show_bug.cgi?id=50611#c3 patch -Np2 -i ../no-strict-aliasing-DwarfCompileUnit.patch Added: don-t-move-DBG_VALUE-instructions.patch =================================================================== --- don-t-move-DBG_VALUE-instructions.patch (rev 0) +++ don-t-move-DBG_VALUE-instructions.patch 2022-03-12 12:04:53 UTC (rev 439467) @@ -0,0 +1,91 @@ +From e7c9a6cae09d99388d8384ca7c0fb5b24b353975 Mon Sep 17 00:00:00 2001 +From: Nikita Popov <npo...@redhat.com> +Date: Mon, 17 Jan 2022 15:48:01 +0100 +Subject: [PATCH] [SDAG] Don't move DBG_VALUE instructions after insertion + point during scheduling (PR53243) + +EmitSchedule() shouldn't be touching instructions after the provided +insertion point. The change introduced in D83561 performs a scan to +the end of the block, and thus may move unrelated instructions. In +particular, this ends up moving instructions that have been produced +by FastISel and will later be deleted. Moving them means that more +instructions than intended are removed. + +Fix this by stopping the iteration when the insertion point is +reached. + +Fixes https://github.com/llvm/llvm-project/issues/53243. + +Differential Revision: https://reviews.llvm.org/D117489 +--- + .../SelectionDAG/ScheduleDAGSDNodes.cpp | 7 ++-- + .../CodeGen/X86/pr53243-tail-call-fastisel.ll | 39 +++++++++++++++++++ + 2 files changed, 43 insertions(+), 3 deletions(-) + create mode 100644 llvm/test/CodeGen/X86/pr53243-tail-call-fastisel.ll + +diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp +index bec240d6c4d4..403f34573899 100644 +--- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp ++++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp +@@ -1057,12 +1057,13 @@ EmitSchedule(MachineBasicBlock::iterator &InsertPos) { + "first terminator cannot be a debug value"); + for (MachineInstr &MI : make_early_inc_range( + make_range(std::next(FirstTerm), InsertBB->end()))) { ++ // Only scan up to insertion point. ++ if (&MI == InsertPos) ++ break; ++ + if (!MI.isDebugValue()) + continue; + +- if (&MI == InsertPos) +- InsertPos = std::prev(InsertPos->getIterator()); +- + // The DBG_VALUE was referencing a value produced by a terminator. By + // moving the DBG_VALUE, the referenced value also needs invalidating. + MI.getOperand(0).ChangeToRegister(0, false); +diff --git a/llvm/test/CodeGen/X86/pr53243-tail-call-fastisel.ll b/llvm/test/CodeGen/X86/pr53243-tail-call-fastisel.ll +new file mode 100644 +index 000000000000..333eff8fb008 +--- /dev/null ++++ b/llvm/test/CodeGen/X86/pr53243-tail-call-fastisel.ll +@@ -0,0 +1,39 @@ ++; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ++; RUN: llc -O0 -fast-isel -mtriple=x86_64-- < %s | FileCheck %s ++ ++define void @test() { ++; CHECK-LABEL: test: ++; CHECK: # %bb.0: ++; CHECK-NEXT: jmp set_state@PLT # TAILCALL ++ tail call void @set_state() ++ call void @llvm.dbg.value(metadata i64 0, metadata !10, metadata !DIExpression()), !dbg !16 ++ ret void ++} ++ ++declare void @set_state() ++ ++; Function Attrs: nofree nosync nounwind readnone speculatable willreturn ++declare void @llvm.dbg.value(metadata, metadata, metadata) #0 ++ ++attributes #0 = { nofree nosync nounwind readnone speculatable willreturn } ++ ++!llvm.module.flags = !{!0} ++!llvm.dbg.cu = !{!1} ++ ++!0 = !{i32 2, !"Debug Info Version", i32 3} ++!1 = distinct !DICompileUnit(language: DW_LANG_Rust, file: !2, producer: "clang LLVM (rustc version 1.60.0-nightly (ec4bcaac4 2022-01-15))", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !3) ++!2 = !DIFile(filename: "src/lib.rs/@/bug.63e521cd-cgu.0", directory: "/tmp/rust-bug") ++!3 = !{!4} ++!4 = !DICompositeType(tag: DW_TAG_enumeration_type, name: "Option", file: !5, baseType: !6, size: 8, align: 8, flags: DIFlagEnumClass, elements: !7) ++!5 = !DIFile(filename: "<unknown>", directory: "") ++!6 = !DIBasicType(name: "u8", size: 8, encoding: DW_ATE_unsigned) ++!7 = !{!8, !9} ++!8 = !DIEnumerator(name: "None", value: 0) ++!9 = !DIEnumerator(name: "Some", value: 1) ++!10 = !DILocalVariable(name: "msg", arg: 2, scope: !11, file: !12, line: 689, type: !6) ++!11 = distinct !DISubprogram(name: "expect<()>", linkageName: "_ZN4core6option15Option$LT$T$GT$6expect17h9a574c18f194c213E", scope: !4, file: !12, line: 689, type: !13, scopeLine: 689, flags: DIFlagPrototyped, spFlags: DISPFlagLocalToUnit | DISPFlagDefinition | DISPFlagOptimized, unit: !1, templateParams: !15, retainedNodes: !15) ++!12 = !DIFile(filename: "/rustc/ec4bcaac450279b029f3480b8b8f1b82ab36a5eb/library/core/src/option.rs", directory: "", checksumkind: CSK_MD5, checksum: "4120c8557937a0772190a676ec193800") ++!13 = !DISubroutineType(types: !14) ++!14 = !{null, !4} ++!15 = !{} ++!16 = !DILocation(line: 0, scope: !11)