As far as I know, the HLASM Toolkit macros are based on Concept 14. We used
Concept 14 in the 80's, and I even developed extensions to it.
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On
Behalf Of Doug Wegscheid
Sent: 04 June 2020 23:17
Seymour,
As a demonstrator of the "baby computer" replica at Manchester I would say
that it seems there was not much to choose between the two, if not in tube
versus delay line then in terms of overall system reliability.
But of course the Delay Line was much more compact than a Williams tube so
mu
> -Original Message-
> From: IBM Mainframe Assembler List l...@listserv.uga.edu> On Behalf Of robi...@dodo.com.au
> Sent: 05 June 2020 00:39
> To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
> Subject: Re: Convert *signed* EBCDIC to packed decimal
>
> On 2020-06-05 08:24, Seymour J Metz wrote:
> > Th
Sorta, kinda. IBM calls them Vector instructions, but they're limited to a
quadword. The term SIMD normally implies a greater degree of parallelism or
streaming.
--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3
From: IBM Mainframe Assembler List
IBM has "Vector" instructions, but the size of a vector is limited to one
quadword. Usefull, but not what you normally think of as SIMD.
--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3
From: IBM Mainframe Assembler List [ASSEMBLER-LIST@LISTSERV.
You may find some of the SHARE presentations useful. I used SIMD z os
share as keywords.
On 2020-06-05 7:11 a.m., Seymour J Metz wrote:
IBM has "Vector" instructions, but the size of a vector is limited to one
quadword. Usefull, but not what you normally think of as SIMD.
--
Shmuel (Seymour J
Well, PLO is certainly an example.
But the relatively recent Transaction instructions greatly expand this.
On Fri, 5 Jun 2020 04:56:53 + Ze'ev Atlas
<01774d97d104-dmarc-requ...@listserv.uga.edu> wrote:
:>I admit being away from the mainframe for long time. Most of my work is on
Solar
- Original Message -
From: "Dave Wade"
To:
Sent: Friday, June 05, 2020 7:39 PM
-Original Message-
From: IBM Mainframe Assembler List On Behalf Of robi...@dodo.com.au
Sent: 05 June 2020 00:39
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
On 2020-06-05 08:24, Seymour J Metz wrote:
> Th
From: "Seymour J Metz"
To:
Sent: Friday, June 05, 2020 9:09 PM
I quoted the time for the model 50.
Then why didn't you write "The 360/50 cycle time was 2 microseconds."?
accidental omission. The info I obtained from a friend (for confirmation)
where the context was the model 50.
---
Thi
- Original Message -
From: "Dave Wade"
Sent: Friday, June 05, 2020 7:29 PM
Subject: Re: Convert *signed* EBCDIC to packed decimal
As a demonstrator of the "baby computer" replica at Manchester I would say
that it seems there was not much to choose between the two, if not in tube
versu
Well, Wikipedia says "It describes computers with multiple processing elements
that perform the same operation on multiple data points simultaneously.", which
is how I recall the term being used, and those don't match.
--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3
__
Although it does actually access multiple data items, PERFORM LOCK OPERATION
(PLO) really doesn't qualify as a SIMD instruction (see my PLO screed below).
Seymour's reference to the Wikipedia page (https://en.wikipedia.org/wiki/SIMD)
is about as adequate a definition as any I've seen. As I reca
The S/370 PoOps mentions the vector facility and says "Vector operations are
described in the publication IBM System/370 Vector Operations, SA22-7125."
You can download it from
http://bitsavers.org/pdf/ibm/370/vectorFacility/SA22-7125-3_Vector_Operations_Aug88.pdf
--
Shmuel (Seymour J.) Metz
h
On 6/5/2020 12:15 PM, Seymour J Metz wrote:
The S/370 PoOps mentions the vector facility and says "Vector operations are
described in the publication IBM System/370 Vector Operations, SA22-7125."
You can download it from
http://bitsavers.org/pdf/ibm/370/vectorFacility/SA22-7125-3_Vector_Operat
Yes, I know. Please review the history of this thread. Dan brought up the old
vector facility ("As I recall, IBM's original implementation of vector
instructions appeared as an optional extension to ESA/390, but these were never
part of the standard architecture defined in the PoO.") and I was c
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