On Apr 18, 2022, at 16:48:23, Seymour J Metz wrote:
>
> VA foo,bar,baz,4
>
Please show how to define foo, bar, and baz with HLASM to specify
A dividend of fixed point 1E15.
Did you use a calculator?
>
> From: Steve Smith
> Sent: Monday, April 18, 2022
It's not just DLG and DLGR, but a whole slew of vector instructions with M4=4.
--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3
From: IBM Mainframe Assembler List [ASSEMBLER-LIST@LISTSERV.UGA.EDU] on behalf
of Paul Gilmartin
VA foo,bar,baz,4
--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3
From: IBM Mainframe Assembler List [ASSEMBLER-LIST@LISTSERV.UGA.EDU] on behalf
of Steve Smith [sasd...@gmail.com]
Sent: Monday, April 18, 2022 11:41 AM
To:
The "fit" part of "conniption fit" is actually redundant.
The definition of 'conniption' reads:
" a fit of rage or hysterics."
Example sentence:
"The casting choice gave the writers a conniption."
(I did not know this either until I looked up the definition of "conniption".)
On 2022-04-19 02:03, Don Higgins wrote:
What instructions take fixed quadword operas? I imagine some variant
of
Divide.
Yes, DLG and DLGR operate on 128 bit dividend in 64 bit r1 and r1+1.
But
since the dividend is in registers, there is no requirement for quad
word
alignment.
He is
On Apr 18, 2022, at 10:03:05, Don Higgins wrote:
>
>> What instructions take fixed quadword operas? I imagine some variant of
>> Divide.
>
> Yes, DLG and DLGR operate on 128 bit dividend in 64 bit r1 and r1+1. But
> since the dividend is in registers, there is no requirement for quad word
>
Seems to me I ran into this issue trying to set up the parms for PLO. The
comparison and replacement values are 128 bits IIRC.
Charles
-Original Message-
From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU]
On Behalf Of Don Higgins
Sent: Monday, April 18, 2022
>What instructions take fixed quadword operas? I imagine some variant of
Divide.
Yes, DLG and DLGR operate on 128 bit dividend in 64 bit r1 and r1+1. But
since the dividend is in registers, there is no requirement for quad word
alignment.
Don Higgins
d...@higgins.net
www.don-higgins.net
HLASM has fixed BINARY constant type specifiers for H, F, FD. The
architecture has no support that I know of for 16-byte fixed binary, so why
should the assembler?
sas
On Mon, Apr 18, 2022 at 11:06 AM Schmitt, Michael
wrote:
> HLASM has fixed decimal constants for Halfwords, Fullwords,
On Apr 18, 2022, at 09:02:41, Schmitt, Michael wrote:
>
> HLASM has fixed decimal constants for Halfwords, Fullwords, Doublewords, with
> appropriate alignment. Why is there none for Quadwords?
>
> The closest I see is LQ, but that appears to be intended for floating point.
>
What
HLASM has fixed decimal constants for Halfwords, Fullwords, Doublewords, with
appropriate alignment. Why is there none for Quadwords?
The closest I see is LQ, but that appears to be intended for floating point.
Ed,
after I wrote back to Dave- just what you said occurred to me too. In
some cases It might be nice to find out "how was I called" or from where
(and thus reading the bear and not location 110).
And maybe the two (LBEAR and STBEAR) are just two flavors of the very
same- one against
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