How would the instrction be interruptable?
How would the lengths of the source and destinations be specified?
- Original Message -
From: "Schmitt, Michael"
To:
Sent: Wednesday, June 08, 2022 8:28 AM
Subject: MVCRL
Why isn't there a Move Relative Long instruction, i.e. move with no
On Jun 7, 2022, at 18:04:22, Graeme Gibson wrote:
... and CPUs with this feature might be cheaper
..or they may be faster, if storage key checking imposes memory access
overheads?
Isn't that in parallel with DAT?
--
gil
... and CPUs with this feature might be cheaper
..or they may be faster, if storage key checking imposes memory access
overheads?
On 7/06/2022 5:26 pm, dave.g4...@gmail.com wrote:
-Original Message-
From: IBM Mainframe Assembler List On Behalf Of Bob Raicer
Sent: 07 June 2022
Not if the code is executing in a getmained area. I've often put code in such
areas for various reasons (e.g. OPEN exits, I/O error exits. etc.), and it's
annoying to have to set up base registers.
But I confess I think an "MVCRL" instruction where *both* source and
destination are relative
If the source is relative to the instruction address, the code would most like
be non-reentrant.
Robert Ngan
DXC Luxoft
-Original Message-
From: IBM Mainframe Assembler List On Behalf
Of Schmitt, Michael
Sent: Tuesday, June 7, 2022 17:29
To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
Subject:
Why isn't there a Move Relative Long instruction, i.e. move with no registers,
where both the source and destination are relative to the instruction address?
Is this because there's no instruction format with two RI fields and a length?
> -Original Message-
> From: IBM Mainframe Assembler List l...@listserv.uga.edu> On Behalf Of Bob Raicer
> Sent: 07 June 2022 01:13
> To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
> Subject: Storage-Key-Removal Facility
>
> While browsing the SA22-7832-13 version of Principles of Operation I saw
