On 2011-05-17 7:14 PM, Nick Kossifidis wrote:
2011/5/17 Seth Forsheeseth.fors...@canonical.com:
On Mon, May 09, 2011 at 09:02:30AM +0200, Seth Forshee wrote:
On Thu, May 05, 2011 at 05:30:42PM +0300, Nick Kossifidis wrote:
Hmm I don't see any errors from reset/phy code, can you disable
On Tue, May 31, 2011 at 7:30 PM, Russell Senior
russ...@personaltelco.net wrote:
Russell == Russell Senior seni...@aracnet.com writes:
Russell I just confirmed Peizhao Hu's observation. The CM9's with
Russell chips marked AR5213A-001 panic on MIPS. CM9's with chips
Russell marked AR5213A-00
Russell == Russell Senior seni...@aracnet.com writes:
Russell I just confirmed Peizhao Hu's observation. The CM9's with
Russell chips marked AR5213A-001 panic on MIPS. CM9's with chips
Russell marked AR5213A-00 do not. It looks like (from my small
Russell sample immediately at hand) the stock
