2011/7/5 Felix Fietkau :
> While 32 KHz sleep clock might provide some power saving benefits,
> it is also a major source of stability issues, on OpenWrt it produced
> some reproducible data bus errors on register accesses on several
> different MIPS platforms.
>
> All the Atheros drivers that I ca
While 32 KHz sleep clock might provide some power saving benefits,
it is also a major source of stability issues, on OpenWrt it produced
some reproducible data bus errors on register accesses on several
different MIPS platforms.
All the Atheros drivers that I can find do not enable this feature,
s
