[ath9k-devel] [PATCH 2/3] ath10k: kill PCIE_LOCAL_REG_READ/WRITE macros

[Bartosz Markowski]

Convert them into inline functions with better names.

Signed-off-by: Bartosz Markowski <bartosz.markow...@tieto.com>
---
 drivers/net/wireless/ath/ath10k/pci.c |   16 +++++++---------
 drivers/net/wireless/ath/ath10k/pci.h |   11 ++++++-----
 2 files changed, 13 insertions(+), 14 deletions(-)

diff --git a/drivers/net/wireless/ath/ath10k/pci.c 
b/drivers/net/wireless/ath/ath10k/pci.c
index 0d1523b..02874b4 100644
--- a/drivers/net/wireless/ath/ath10k/pci.c
+++ b/drivers/net/wireless/ath/ath10k/pci.c
@@ -2109,8 +2109,7 @@ static void ath10k_pci_device_reset(struct ath10k_pci 
*ar_pci)
        if (!mem)
                return;
 
-       A_PCIE_LOCAL_REG_WRITE(mem, PCIE_SOC_WAKE_ADDRESS,
-                              PCIE_SOC_WAKE_V_MASK);
+       ath10k_pci_reg_write32(mem, PCIE_SOC_WAKE_ADDRESS, 
PCIE_SOC_WAKE_V_MASK);
        for (i = 0; i < ATH_PCI_RESET_WAIT_MAX; i++) {
                if (ath10k_pci_target_is_awake(ar))
                        break;
@@ -2118,12 +2117,12 @@ static void ath10k_pci_device_reset(struct ath10k_pci 
*ar_pci)
        }
 
        /* Put Target, including PCIe, into RESET. */
-       val = A_PCIE_LOCAL_REG_READ(mem, SOC_GLOBAL_RESET_ADDRESS);
+       val = ath10k_pci_reg_read32(mem, SOC_GLOBAL_RESET_ADDRESS);
        val |= 1;
-       A_PCIE_LOCAL_REG_WRITE(mem, SOC_GLOBAL_RESET_ADDRESS, val);
+       ath10k_pci_reg_write32(mem, SOC_GLOBAL_RESET_ADDRESS, val);
 
        for (i = 0; i < ATH_PCI_RESET_WAIT_MAX; i++) {
-               if (A_PCIE_LOCAL_REG_READ(mem, RTC_STATE_ADDRESS) &
+               if (ath10k_pci_reg_read32(mem, RTC_STATE_ADDRESS) &
                                          RTC_STATE_COLD_RESET_MASK)
                        break;
                msleep(1);
@@ -2131,17 +2130,16 @@ static void ath10k_pci_device_reset(struct ath10k_pci 
*ar_pci)
 
        /* Pull Target, including PCIe, out of RESET. */
        val &= ~1;
-       A_PCIE_LOCAL_REG_WRITE(mem, SOC_GLOBAL_RESET_ADDRESS, val);
+       ath10k_pci_reg_write32(mem, SOC_GLOBAL_RESET_ADDRESS, val);
 
        for (i = 0; i < ATH_PCI_RESET_WAIT_MAX; i++) {
-               if (!(A_PCIE_LOCAL_REG_READ(mem, RTC_STATE_ADDRESS) &
+               if (!(ath10k_pci_reg_read32(mem, RTC_STATE_ADDRESS) &
                                            RTC_STATE_COLD_RESET_MASK))
                        break;
                msleep(1);
        }
 
-       A_PCIE_LOCAL_REG_WRITE(mem, PCIE_SOC_WAKE_ADDRESS,
-                              PCIE_SOC_WAKE_RESET);
+       ath10k_pci_reg_write32(mem, PCIE_SOC_WAKE_ADDRESS, PCIE_SOC_WAKE_RESET);
 }
 
 static void ath10k_pci_dump_features(struct ath10k_pci *ar_pci)
diff --git a/drivers/net/wireless/ath/ath10k/pci.h 
b/drivers/net/wireless/ath/ath10k/pci.h
index 188593e..ad97a6b 100644
--- a/drivers/net/wireless/ath/ath10k/pci.h
+++ b/drivers/net/wireless/ath/ath10k/pci.h
@@ -229,12 +229,13 @@ static inline struct ath10k_pci *ath10k_pci_priv(struct 
ath10k *ar)
        return ar->hif.priv;
 }
 
-#define A_PCIE_LOCAL_REG_READ(mem, addr) \
-       ioread32((mem) + PCIE_LOCAL_BASE_ADDRESS + (u32)(addr))
+static inline u32 ath10k_pci_reg_read32(void __iomem *mem, u32 addr) {
+       return ioread32(mem + PCIE_LOCAL_BASE_ADDRESS + addr);
+}
 
-#define A_PCIE_LOCAL_REG_WRITE(mem, addr, val) \
-       iowrite32((val),                       \
-                 ((mem) + PCIE_LOCAL_BASE_ADDRESS + (u32)(addr)))
+static inline void ath10k_pci_reg_write32(void __iomem *mem, u32 addr, u32 
val) {
+       iowrite32(val, mem + PCIE_LOCAL_BASE_ADDRESS + addr);
+}
 
 #define ATH_PCI_RESET_WAIT_MAX 10 /* ms */
 #define PCIE_WAKE_TIMEOUT 5000 /* 5ms */
-- 
1.7.10

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