Hi Silvio,
On Tue, May 14, 2013 at 05:52:01PM +, Fricke, Silvio wrote:
> static int imx6_init(void)
> {
> + u32 rev;
> + u32 mx6_silicon_revision;
> +
> imx6_boot_save_loc((void *)MX6_SRC_BASE_ADDR);
>
> add_generic_device("imx-iomuxv3", 0, NULL, MX6_IOMUXC_BASE_
On 05/15/2013 08:39 AM, Sascha Hauer wrote:
On Wed, May 15, 2013 at 08:20:03AM +0200, Sebastian Hesselbarth wrote:
On 05/15/2013 07:55 AM, Sascha Hauer wrote:
Is it possible to remap the registers using the kwbimage tool? That way
every code that runs would see the desired register layout.
Al
Hi Christoph,
Le Tue, 14 May 2013 19:15:31 +0200,
Christoph Fritz a écrit :
> On Fri, 2013-05-10 at 14:53 +0200, Eric Bénard wrote:
> > > > My boot sources are nand-flash (thats where u-boot is at the moment)
> > > > (and SD-card for testing).
> > > >
> > > > I tried to flash zbarebox.bin to na
> > > On Tue, May 07, 2013 at 10:21:39PM +0200, Jean-Christophe
> > > PLAGNIOL-VILLARD wrote:
> > >> this brake the nand support on at91sam9x5ek
> > >> where we have a non compliant ONFI nand
> > >> NAND device: Manufacturer ID: 0xad, Chip ID: 0xda (Hynix NAND 256MiB
> > >> 3,3V 8-bit), 256MiB, p
On Wed, May 15, 2013 at 08:20:03AM +0200, Sebastian Hesselbarth wrote:
> On 05/15/2013 07:55 AM, Sascha Hauer wrote:
> >>>Is it possible to remap the registers using the kwbimage tool? That way
> >>>every code that runs would see the desired register layout.
> >>
> >>Although possible, I prefer a d
Hi Enrico,
On Tue, May 14, 2013 at 03:14:54PM +0200, Enrico Scholz wrote:
> Although conclusions in 50d1b2de8ea0f3b8d89fe3a97ce64315996ed4cb "ARM
> v7: Fix register corruption in v7_mmu_cache_off" are correct, the
> implemented fix is not complete because the following failure can
> happen:
>
> 1
On 05/15/2013 07:55 AM, Sascha Hauer wrote:
Is it possible to remap the registers using the kwbimage tool? That way
every code that runs would see the desired register layout.
Although possible, I prefer a different approach:
- IIRC all MVEBU SoCs boot up at 0xd000
- Have a regbase variable
Hi Sebastian,
On Mon, May 13, 2013 at 11:17:21AM +0200, Sebastian Hesselbarth wrote:
> On 05/13/2013 09:58 AM, Sascha Hauer wrote:
> >On Sun, May 12, 2013 at 03:09:04PM +0200, Sebastian Hesselbarth wrote:
> >>This commit adds minimal support for the Marvell Dove SoC (88AP510) as
> >>first SoC of t
This commit uses the newly introduced image_count_options() function
to:
- See if there is any DATA option that require the creation of an
extended header for v0 header.
- Verify that no more than one payload has been provided when
creating a v0 header.
- Verify that no more than one bi
Although conclusions in 50d1b2de8ea0f3b8d89fe3a97ce64315996ed4cb "ARM
v7: Fix register corruption in v7_mmu_cache_off" are correct, the
implemented fix is not complete because the following failure can
happen:
1. d-cache contains the cache line around 'sp'
2. v7_mmu_cache_off() disables cache
3.
Dear Jean-Christophe
We have a problem that our AT91 board will not start from internal
ROM because the BMS pin is not
connected to 3.3 V. (BMS=0)
Since the chip is a BGA and the BMS pin is not connected to the outside
of the PCB we cannot change
the hardware setting making the BMS pin =1
We
At least the iMX6 boot rom seems to jump into barebox with a non
invalidated d-cache which causes data corruption when
v7_mmu_cache_flush() executed by arm_early_mmu_cache_flush() overrides
stack or other valid data.
That's why the cache must be invalided for this processors explicitly
(e.g. in ba
We now assume that at most one binary header can be added, so we no
longer need to loop for all configuration options to find the binary
blobs. We simply find the binary blob configuration option in
'binarye' and use that when we need to generate the corresponding
header.
Also, just like we did fo
Hello,
This patch set builds on top of Sebastian Hesselbarth work on the
Marvell Dove support, and adds basic Marvell Kirkwood support, as well
as a number of improvements to the kwbimage tool to have a better
support for v0 images used on Kirkwood and Dove.
In particular, the patches on kwbimage
The Kirkwood Marvell SoC uses a Marvell-specific implementation of an
ARMv5TE compatible ARM core, the Feroceon. This patch introduces a
Kconfig option that allows to select this CPU type.
Signed-off-by: Thomas Petazzoni
---
arch/arm/cpu/Kconfig |8
1 file changed, 8 insertions(+)
The Globalscale Guruplug board is a small NAS-type plug platform that
uses a Marvell Kirkwood SoC.
Signed-off-by: Thomas Petazzoni
---
arch/arm/Makefile |1 +
arch/arm/boards/globalscale-guruplug/Makefile |2 ++
arch/arm/boards/globalscale-guruplug/c
Marvell Kirkwood SoCs are based on a ARMv5 compatible core designed by
Marvell, and a large number of peripherals with Marvell Dove, Marvell
Armada 370 and Marvell Armada XP SoCs. The Marvell Kirkwood are used
in a large number of consumer-grade NAS devices, for example.
Signed-off-by: Thomas Peta
From: Sebastian Hesselbarth
The SolidRun CuBox is a small cubic platform based on the Marvell
Dove SoC. There is nothing more than a console, yet.
Signed-off-by: Sebastian Hesselbarth
Signed-off-by: Thomas Petazzoni
---
arch/arm/Makefile |1 +
arch/arm/boards
The v0 header, used on Kirkwood, has some fields to indicate the type
of the NAND ECC, and the page size of the NAND. This commit adds
support for such fields, which are needed to support the Kirkwood
Guruplug platform.
Signed-off-by: Thomas Petazzoni
---
scripts/kwbimage.c | 42 ++
The function image_boot_mode_id() converts the name of a boot media
into the corresponding Marvell specific code. However, 0 that we
currently used to indicate that the boot media name wasn't found,
could potentially be a valid value. So instead we use -1 to indicate a
failure.
This is also done i
From: Sebastian Hesselbarth
There are more than Armada 370/XP in Marvell MVEBU SoC familiy. To avoid
irritation with source file nameing, we rename setup source file for
Armada 370/XP from core.c to armada-370-xp.c.
Signed-off-by: Sebastian Hesselbarth
Signed-off-by: Thomas Petazzoni
---
arch
From: Sebastian Hesselbarth
This commit adds minimal support for the Marvell Dove SoC (88AP510) as
first SoC of the Marvell Orion family. Orion SoCs have a different timer,
therefore current mach-mvebu and Armada 370/XP Kconfig and Makefiles are
slightly modified and a new clocksource drivers is
From: "S. Fricke"
This is mainly a backport of the imx6_revision function of
arch/arm/mach-imx/mach-imx6q.c in the linux kernel sources.
Signed-off-by: S. Fricke
---
arch/arm/mach-imx/imx6.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/mach-imx/imx6.
On Fri, 2013-05-10 at 14:53 +0200, Eric Bénard wrote:
> > > My boot sources are nand-flash (thats where u-boot is at the moment)
> > > (and SD-card for testing).
> > >
> > > I tried to flash zbarebox.bin to nand-flash. It started but with error
> > > nand: NAND type unknown, ec,f1
> > > nand: No N
the dhcp command will return with 0 when ctrl-c is pressed. Fix this to
-EINTR instead.
Signed-off-by: Sascha Hauer
---
net/dhcp.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/net/dhcp.c b/net/dhcp.c
index 8233ec3..7324c94 100644
--- a/net/dhcp.c
+++ b/net/dhcp.c
@@
When the dhcp code discovered the tftp-server-name option it immediately
tries to resolve the name. This can't succeed since the we are somewhere
in the dhcp processing and the nameserver may not even be known.
Fix this by resolving the name when dhcp is completed. While at it, do
this in a way th
26 matches
Mail list logo
