On Mon, Nov 09, 2015 at 06:49:53PM +, Trent Piepho wrote:
> On Mon, 2015-11-09 at 13:32 +0300, Peter Mamonov wrote:
> > Deleted pieces of code detect MBR-containig device as a FAT-type device,
> > if it's first partition contains a FAT filesystem. This behaviour enabled
> > one
> > to mount th
On Tue, Nov 10, 2015 at 09:04:23AM +0100, Sascha Hauer wrote:
> On Mon, Nov 09, 2015 at 06:49:53PM +, Trent Piepho wrote:
> > On Mon, 2015-11-09 at 13:32 +0300, Peter Mamonov wrote:
> > > Deleted pieces of code detect MBR-containig device as a FAT-type device,
> > > if it's first partition cont
On Mon, Nov 09, 2015 at 01:09:20PM +0100, Stefan Christ wrote:
> Hi Sascha,
>
> > > the patchstack first refactors the phyCARD-i.MX6 and phyFLEX-i.MX6 to a
> > > common
> > > phytec-som-imx6. Then some phyFLEX-i.MX6 variants and the new
> > > phyCORE-i.MX6 are
> > > added plus some environment u
On Tue, 2015-11-10 at 09:04 +0100, Sascha Hauer wrote:
> From 98fb34f2aa271138eab28a36aec733fe6572339c Mon Sep 17 00:00:00 2001
> From: Sascha Hauer
> Date: Tue, 10 Nov 2015 08:58:16 +0100
> Subject: [PATCH] ARM: omap: Use correct device to mount on /boot
>
> The current code tests if a partitio
Hi Sascha,
On Tue, Nov 10, 2015 at 10:40 AM, Sascha Hauer wrote:
> Hi Sergey,
>
> On Mon, Nov 09, 2015 at 01:06:33PM +0300, Sergey Koshechkin wrote:
>> Signed-off-by: Sergey Koshechkin
>> ---
>> scripts/basic/docproc.c | 334
>> +---
>> 1 file change
This boolean parameter tells you if the FPGA is programmed or not. It
can be accessed from the shell as "$fpga.programmed". One could use
this to not program the FPGA if it's already programmed.
There is an annoying limitation of the way barebox puts parameters
into the shell env: it requires th
The dw MAC requires that all clock domains to be running for it to
finish a MAC reset. This include the clock provided by the PHY.
If the PHY is powered down, bit BMCR_PDOWN set, then it won't be
generating a clock. And so the MAC never comes out of reset. On
shutdown, Linux will put the PHY in
A comment in the socfpga init said that it was "Clearing emac0 PHY
interface select to 0", but this was doubly incorrect. It was setting
physel for emac1, not emac0, and it was setting physel to 1 (RGMII)
not 0 (GMII). All supported socfpga boards use RGMII, and use emac1,
so fix the comment to r
Antony Pavlov (2):
MIPS: black-swift: skip pbl lowlevel init if running from RAM
MIPS: tplink-mr3020: skip pbl lowlevel init if running from RAM
Oleksij Rempel (1):
MIPS: pbl: add pbl_blt macro
arch/mips/boards/black-swift/include/board/board_pbl_start.h | 3 +++
.../boards/tplink-mr3020/
Black Swift has 16 MiB flash boot ROM that can be remapped to 0xbf00.
Signed-off-by: Antony Pavlov
---
arch/mips/boards/black-swift/include/board/board_pbl_start.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/mips/boards/black-swift/include/board/board_pbl_start.h
b/arch/mips
From: Oleksij Rempel
Barebox' PBL can initialize memory controller of the board.
But we can use memory controller initialization routine
only if PBL runs from ROM or on-chip SRAM.
MIPS architecture standard boot vector is 0xbfc0
so on most MIPS SoCs all addresses higher than 0xbfc0
belong
TP-Link MR3020 has 4 MiB flash boot ROM that is mapped to 0xbfc0.
Signed-off-by: Antony Pavlov
---
arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h
b/arch/mips
On Tue, Nov 10, 2015 at 11:04:46PM +0300, Sergey Koshechkin wrote:
> Hi Sascha,
>
> On Tue, Nov 10, 2015 at 10:40 AM, Sascha Hauer wrote:
> > Hi Sergey,
> >
> > On Mon, Nov 09, 2015 at 01:06:33PM +0300, Sergey Koshechkin wrote:
> >> Signed-off-by: Sergey Koshechkin
> >> ---
> >> scripts/basic/d
On Mon, Nov 09, 2015 at 01:32:51PM +0300, Peter Mamonov wrote:
> Deleted pieces of code detect MBR-containig device as a FAT-type device,
> if it's first partition contains a FAT filesystem. This behaviour enabled one
> to mount the FAT FS which is either directly on the device (disk0) or on
> the
On Wed, Nov 11, 2015 at 2:09 AM, Antony Pavlov wrote:
> Black Swift has 16 MiB flash boot ROM that can be remapped to 0xbf00.
>
> Signed-off-by: Antony Pavlov
> ---
> arch/mips/boards/black-swift/include/board/board_pbl_start.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch
On Mon, Nov 09, 2015 at 10:02:51AM +0100, Stefan Christ wrote:
> From: Christian Hemp
>
> Add Phytec phyCORE-i.MX6 SOM.
> - imx6dl-phytec-phycore-som-nand
> - 256GB RAM on 1 Bank with 32Bit
> - 10/100MBit Ethernet
> - NAND
> - SD
> - UART
>
> Signed-o
On Tue, Nov 10, 2015 at 10:27:12AM +0300, Antony Pavlov wrote:
> This patchseries adds return from exception for MIPS, so the 'md' command
> incorrect memory accesses can be handled correctly instead of crashing the
> system,
> e.g.
>
> barebox:/ md -l 0xa003+4
> a003:
On Wed, Nov 11, 2015 at 2:09 AM, Antony Pavlov wrote:
> From: Oleksij Rempel
>
> Barebox' PBL can initialize memory controller of the board.
> But we can use memory controller initialization routine
> only if PBL runs from ROM or on-chip SRAM.
> MIPS architecture standard boot vector is 0xbfc
On Tue, Nov 10, 2015 at 10:27:23PM +, Trent Piepho wrote:
> This boolean parameter tells you if the FPGA is programmed or not. It
> can be accessed from the shell as "$fpga.programmed". One could use
> this to not program the FPGA if it's already programmed.
>
> There is an annoying limitati
Add support for OMAP Watchdog driver.
Based on omap_wdt Linux driver (v4.3-rc1).
Signed-off-by: Teresa Remmet
---
drivers/watchdog/Kconfig| 6 ++
drivers/watchdog/Makefile | 1 +
drivers/watchdog/omap_wdt.c | 199
3 files changed, 206 inser
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