The dw MAC requires that all clock domains to be running for it to
finish a MAC reset. This include the clock provided by the PHY.
If the PHY is powered down, bit BMCR_PDOWN set, then it won't be
generating a clock. And so the MAC never comes out of reset. On
shutdown, Linux will put the PHY in
Printing 3 lines of output per CRTC if no modes are found (which
may be just fine if no display is attached) is just a bit too much,
especially on SoCs like i.MX6Q that carry 4 CRTCs.
Failing to find modes is not a fatal error, so the error does not
need to be propagated into a probe failure.
Sign
The clock driver will overwrite those values anyway, so no
point in setting them in the DCD.
Signed-off-by: Lucas Stach
---
arch/arm/boards/gateworks-ventana/clocks.imxcfg | 8
.../gateworks-ventana/flash-header-ventana-quad-1gx64.imxcfg | 1 -
2 files changed, 9
The dw MAC requires that all clock domains to be running for it to
finish a MAC reset. This include the clock provided by the PHY.
If the PHY is powered down, bit BMCR_PDOWN set, then it won't be
generating a clock. And so the MAC never comes out of reset. On
shutdown, Linux will put the PHY in
This can be used by the i2c_probe command to iterate over i2c adapters.
Signed-off-by: Sascha Hauer
---
drivers/i2c/i2c.c | 8
include/i2c/i2c.h | 4
2 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/i2c/i2c.c b/drivers/i2c/i2c.c
index 52aaea8..9ed96da 100644
-
Instead of insisting on multiple parameters just use sane defaults.
This allows us to scan all addresses on all busses which is normally
what one wants to get an overview over devices on i2c busses.
Signed-off-by: Sascha Hauer
---
commands/i2c.c | 56 +
console_puts uses console_putc() to output characters, so the carriage
return should be output with the same function.
Signed-off-by: Sascha Hauer
---
pbl/console.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/pbl/console.c b/pbl/console.c
index 3574753..4cefe748 100644
--
On Thu, Mar 12, 2015 at 3:39 PM, Jan Luebbe wrote:
> Hi,
>
> this is the current work-in-progress state of my FIT support patches.
> The FIT loading code has basically been rewritten from scratch, as the
> original U-Boot code uses libfdt and barebox's DT support works on an
> in-memory tree.
>
>
Use an 'initramfs' file if it exists instead of nfsroot. This offers the
possibility to quickly boot complete filesystems as initramfs without
the need to flash an SD-card or similar. If the initramfs does not
exist, it uses the default nfsroot mechanism.
Signed-off-by: Markus Pargmann
---
Chang
Signed-off-by: Sergey Koshechkin
---
scripts/basic/.gitignore | 1 -
scripts/basic/Makefile | 3 +-
scripts/basic/docproc.c | 402 ---
3 files changed, 1 insertion(+), 405 deletions(-)
delete mode 100644 scripts/basic/docproc.c
diff --git a/scr
Changes since v1:
* fix commit messages (thanks to Dmitry Smagin);
* assume that tplink-mr3020's ROM start address is 0xbf00;
* add 'Tested-by: Yegor Yefremov '.
Antony Pavlov (2):
MIPS: black-swift: skip pbl lowlevel init if running from RAM
MIPS: tplink-mr3020: skip pbl lowlevel i
Black Swift has 16 MiB flash boot ROM. The standard board's
bootloader (U-Boot_mod) remaps boot ROM to 0xbf00.
Signed-off-by: Antony Pavlov
Tested-by: Yegor Yefremov
---
arch/mips/boards/black-swift/include/board/board_pbl_start.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/
TP-Link MR3020 has 4 MiB flash boot ROM.
Usually boot ROM is mapped to 0xbfc0.
However, as AR9331 allows to remap boot ROM to 0xbf00
it's better to assume that boot ROM starts at 0xbf00.
Signed-off-by: Antony Pavlov
---
arch/mips/boards/tplink-mr3020/include/board/board_pbl_start.h |
From: Oleksij Rempel
Barebox' PBL is able to initialize SoC's memory controller,
but it can be used only if PBL runs from ROM or on-chip SRAM.
MIPS architecture standard boot vector is 0xbfc0
so on most MIPS SoCs all addresses higher than 0xbfc0
belong to boot ROM or on-chip SRAM. Thus th
On Wed, 11 Nov 2015 04:09:12 +0300
Antony Pavlov wrote:
Hi Sascha!
Please don't apply this patchseries.
I'm working on cosmetic fixes.
I'll send the v2 in a few hours.
> Antony Pavlov (2):
> MIPS: black-swift: skip pbl lowlevel init if running from RAM
> MIPS: tplink-mr3020: skip pbl lowl
On Tue, Nov 10, 2015 at 11:37:07PM +, Trent Piepho wrote:
> A comment in the socfpga init said that it was "Clearing emac0 PHY
> interface select to 0", but this was doubly incorrect. It was setting
> physel for emac1, not emac0, and it was setting physel to 1 (RGMII)
> not 0 (GMII). All supp
On Tue, Nov 10, 2015 at 10:44:50PM +, Trent Piepho wrote:
> The dw MAC requires that all clock domains to be running for it to
> finish a MAC reset. This include the clock provided by the PHY.
>
> If the PHY is powered down, bit BMCR_PDOWN set, then it won't be
> generating a clock. And so t
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