Re: Device-tree node renames break barebox/kernel compatibility...

On Wed, 13 Jun 2018 08:42:30 +0200 Sascha Hauer wrote: > On Tue, Jun 12, 2018 at 03:46:06PM +0200, David Jander wrote: > > On Tue, 12 Jun 2018 14:47:38 +0200 > > Sascha Hauer wrote: > > > > > Hi David, > > > > > > On Tue, Jun 12, 2018 at 02:23:08PM +0200, David Jander wrote: > > > > > > >

Re: Device-tree node renames break barebox/kernel compatibility...

On Tue, Jun 12, 2018 at 03:46:06PM +0200, David Jander wrote: > On Tue, 12 Jun 2018 14:47:38 +0200 > Sascha Hauer wrote: > > > Hi David, > > > > On Tue, Jun 12, 2018 at 02:23:08PM +0200, David Jander wrote: > > > > > > Hi Sascha, > > > > > > I know this is old already, and I was surprised that

[PATCH v5 38/54] ARM: Specify HAVE_PBL_IMAGE for CPU_64

Signed-off-by: Andrey Smirnov --- arch/arm/cpu/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/cpu/Kconfig b/arch/arm/cpu/Kconfig index d889e9afb..2359c56b3 100644 --- a/arch/arm/cpu/Kconfig +++ b/arch/arm/cpu/Kconfig @@ -12,6 +12,7 @@ config CPU_32 config CPU_64 boo

[PATCH v5 36/54] Add builtin firmware support

From: Sascha Hauer Signed-off-by: Sascha Hauer [andrew.smir...@gmail.com: Add dummy.o in case directory is empty] Signed-off-by: Andrey Smirnov --- Makefile | 2 +- arch/arm/Kconfig | 1 + firmware/Kconfig | 7 ++ firmware/Makefile | 55 +++

[PATCH v5 33/54] clock: Use udelay() to implement mdelay()

Signed-off-by: Andrey Smirnov --- lib/clock.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/lib/clock.c b/lib/clock.c index b7cc49fa6..37e45489c 100644 --- a/lib/clock.c +++ b/lib/clock.c @@ -50,9 +50,11 @@ EXPORT_SYMBOL(udelay); void mdelay(unsigned long msecs)

[PATCH v5 37/54] ARM: i.MX8: Add DDRC PHY support code

Add DDRC PHY support code needed to upload DDR training firwmare as well as to wait for the training process to complete. Those are needed to support board specific DDR initialization code. Signed-off-by: Andrey Smirnov --- arch/arm/mach-imx/Makefile | 1 + arch/arm/mach-imx/i

[PATCH v5 39/54] ARM: lib64: Make string functions aware of MMU configuration

Optimized version of memset() in memset.S if called as: memset(foo, 0, size) will try to explicitly zero out data cache with: dc zva, dst which will result in Alignement Exception (DABT) if MMU is not enabled. For more info see: - C4.4.8 "DC ZVA, Data Cache Zero by VA" - D5.2

[PATCH v5 42/54] ARM: no-mmu: Disable building for ARMv8

Disable building for ARMv8 since no-mmu.c only supports ARMv7 Signed-off-by: Andrey Smirnov --- arch/arm/cpu/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/Makefile b/arch/arm/cpu/Makefile index 0316d251c..5b4b832e8 100644 --- a/arch/arm/cpu/Makefile ++

[PATCH v5 43/54] ARM: interrupts64: Include ESR value in exception traceback

Oftentimes knowing the class of exception is not enough and full ESR value is needed to decode the specifics. Add code to print ESR as a part of excpetion traceback to provide that information. Signed-off-by: Andrey Smirnov --- arch/arm/cpu/interrupts_64.c | 3 ++- 1 file changed, 2 insertions(+

[PATCH v5 44/54] ARM: mmu64: Trivial code simplification

Signed-off-by: Andrey Smirnov --- arch/arm/cpu/mmu_64.c | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/arm/cpu/mmu_64.c b/arch/arm/cpu/mmu_64.c index d5a3d2223..80cf240d3 100644 --- a/arch/arm/cpu/mmu_64.c +++ b/arch/arm/cpu/mmu_64.c @@ -126,6 +126,7 @@ static v

[PATCH v5 46/54] ARM: mmu64: Convert flags in arch_remap_range()

Flags passed to arch_remap_range() are architecture independent, so it can't be passed as is to map_region(). Add code to do the proper conversion to avoid subtle bugs that this confusion brings. Signed-off-by: Andrey Smirnov --- arch/arm/cpu/mmu_64.c | 11 +++ 1 file changed, 11 inserti

[PATCH v5 53/54] ARM: i.MX8: Add i.MX8mq EVK support

From: Sascha Hauer Signed-off-by: Sascha Hauer Signed-off-by: Andrey Smirnov --- Documentation/boards/imx.rst | 13 +- Documentation/boards/imx/nxp-imx8mq-evk.rst | 116 ++ arch/arm/boards/Makefile |1 + arch/arm/boards/nxp-imx8mq-evk/.gitignore

[PATCH v5 13/54] gpio: i.MX: Add i.MX8mq support

From: Sascha Hauer Signed-off-by: Sascha Hauer --- drivers/gpio/gpio-imx.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpio/gpio-imx.c b/drivers/gpio/gpio-imx.c index d8bcea223..d618e6011 100644 --- a/drivers/gpio/gpio-imx.c +++ b/drivers/gpio/gpio-imx.c @@ -190,6 +190,9 @@ s

[PATCH v5 24/54] ARM: i.MX: xload-esdhc: Allow custom buffer address, device offset

Add code to support specifying different buffer address and SD/MMC device offset to read it from in esdhc_start_image(). This change is needed to support i.MX8. NOTE: We intentionnaly "emulate" reading at arbitrary offset in esdhc_start_image() as opposed to implementing it in esdhc_read_blocks()

[PATCH v5 17/54] ARM: i.MX: Add basic CCM constants for i.MX8

Signed-off-by: Andrey Smirnov --- arch/arm/mach-imx/include/mach/imx8-ccm-regs.h | 15 +++ 1 file changed, 15 insertions(+) create mode 100644 arch/arm/mach-imx/include/mach/imx8-ccm-regs.h diff --git a/arch/arm/mach-imx/include/mach/imx8-ccm-regs.h b/arch/arm/mach-imx/include/mach

[PATCH v5 11/54] serial: i.MX: Add i.MX8 support

From: Sascha Hauer Signed-off-by: Sascha Hauer --- drivers/serial/serial_imx.c | 5 - include/serial/imx-uart.h | 5 + 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/serial/serial_imx.c b/drivers/serial/serial_imx.c index c8af995aa..09341af87 100644 --- a/driver

[PATCH v5 02/54] ARM: i.MX: compile arm32 specific errata only for CPU32

From: Sascha Hauer Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/cpu_init.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-imx/cpu_init.c b/arch/arm/mach-imx/cpu_init.c index 6a6c4c521..5b93d12da 100644 --- a/arch/arm/mach-imx/cpu_init.c +++ b/arch/arm/mach-imx/cpu_init

[PATCH v5 01/54] ARM: i.MX: xload: Fix compiler warning

From: Sascha Hauer the ESDHC controller is a 32bit device, so can do DMA only on the lower 32bit. Fix the compiler warning about casting a pointer to integer of different size on aarch64 by casting to unsigned long first. Error out if the destination does not fit into 32bit though. Signed-off-by

[PATCH v5 04/54] aarch64: Add i.MX8 debug UART support

From: Sascha Hauer Signed-off-by: Sascha Hauer [andrew.smir...@gmail.com: Added imx8_uart_setup_ll()] Signed-off-by: Andrey Smirnov --- arch/arm/mach-imx/include/mach/debug_ll.h | 11 +++ common/Kconfig| 8 2 files changed, 19 insertions(+) diff -

[PATCH v5 28/54] Documentation: i.MX: Add missing

Signed-off-by: Andrey Smirnov --- Documentation/boards/imx.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/boards/imx.rst b/Documentation/boards/imx.rst index 8de2bd5c5..b3002badf 100644 --- a/Documentation/boards/imx.rst +++ b/Documentation/boards/imx.rst @@

[PATCH v5 21/54] ARM: i.MX: boot: Fix address casting on 64-bit platforms

Add an intermediary casting step in order to avoid casting 32-bit integer to 64-bit pointer on 64-bit platforms. Signed-off-by: Andrey Smirnov --- arch/arm/mach-imx/boot.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/boot.c b/arch/arm/mach-imx/boot.c in

[PATCH v5 29/54] clocksource: armv8-timer: Make armv8_clocksource_read() static

There are no users of that function outside of the driver itself, so re-declare it as static. Signed-off-by: Andrey Smirnov --- drivers/clocksource/armv8-timer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clocksource/armv8-timer.c b/drivers/clocksource/armv8-tim

[PATCH v5 34/54] ARM: i.MX8: Add DDRC PHY and DDR CTL base addresses

Signed-off-by: Andrey Smirnov --- arch/arm/mach-imx/include/mach/imx8mq-regs.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/include/mach/imx8mq-regs.h b/arch/arm/mach-imx/include/mach/imx8mq-regs.h index 6dac00107..51936f526 100644 --- a/arch/arm/mach-

[PATCH v5 47/54] ARM: include: dma: Add missing no-MMU stubs

Add stubs for dma_map_single() and dma_unmap_single() that were needed for no-MMU build for ARM64 to succeed. Signed-off-by: Andrey Smirnov --- arch/arm/include/asm/dma.h | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/include/asm/dma.h b/arch/arm/include/asm/dma.h inde

[PATCH v5 50/54] scripts: imx-image: Use a loop to create multiple header copies

Use a loop to create multiple header copies on i.MX35 to avoid code duplication. Signed-off-by: Andrey Smirnov --- scripts/imx/imx-image.c | 9 +++-- 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/scripts/imx/imx-image.c b/scripts/imx/imx-image.c index 294f51a90..bc1f821bd 100

[PATCH v5 32/54] common/clock: Move delay and timeout functions to lib/

Move delay and timeout functions to lib/ in order to share them with PBL. Currently only the most trivial implementation of get_time_ns() usefull to implement never-expiring timeouts is provided. More work is needed to allow board specific overrides. Signed-off-by: Andrey Smirnov --- common/cloc

[PATCH v5 52/54] scripts: imx-image: Add i.MX8MQ support

From: Sascha Hauer Signed-off-by: Sascha Hauer Signed-off-by: Andrey Smirnov --- scripts/imx/imx-image.c | 54 + scripts/imx/imx.c | 23 -- scripts/imx/imx.h | 2 ++ 3 files changed, 66 insertions(+), 13 deletions(-) diff --

[PATCH v5 48/54] scripts: imx-image: Drop error return from write_dcd()

Write_dcd() exits early in case of failure, so there's no realy reason to have it return a error code as a result. Drop it and simplify the caller code. Signed-off-by: Andrey Smirnov --- scripts/imx/imx-image.c | 10 +++--- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/script

[PATCH v5 54/54] ARM: Introduce imx_v8_defconfig

Similar to imx_v7_defconfig, add imx_v8_defconfig as a default configuration encompassing all ARMv8 based i.MX SoCs. Signed-off-by: Andrey Smirnov --- arch/arm/configs/imx_v8_defconfig | 107 ++ 1 file changed, 107 insertions(+) create mode 100644 arch/arm/configs/im

[PATCH v5 49/54] scripts: imx-image: Limit v2 header size to HEADER_LEN

Given the following: 1. Assembly code, namely "b 0x1000" instruction, in bb_header[] assumes that i.MX image header occupies first HEADER_LEN bytes and bootloader executable is located right after. 2. Code in imx_image_size() assumes that i.MX image header is HEADER_LEN bytes 3. O

[PATCH v5 51/54] scripts: imx-image: Share the code to write barebox header

Signed-off-by: Andrey Smirnov --- scripts/imx/imx-image.c | 42 - 1 file changed, 20 insertions(+), 22 deletions(-) diff --git a/scripts/imx/imx-image.c b/scripts/imx/imx-image.c index bc1f821bd..4a08581fb 100644 --- a/scripts/imx/imx-image.c +++ b/scripts

[PATCH v5 03/54] ARM: Add i.MX8 support

From: Sascha Hauer Signed-off-by: Sascha Hauer [andrew.smir...@gmail.com: fix B0 chips to report IMX_CHIP_REV_2_0] Signed-off-by: Andrey Smirnov --- arch/arm/dts/imx8mq-pinfunc.h | 623 + arch/arm/dts/imx8mq.dtsi | 624 + arc

[PATCH v5 16/54] ARM: i.MX: Add IOMUX pad constants for i.MX8

Ported from U-Boot Signed-off-by: Andrey Smirnov --- arch/arm/mach-imx/include/mach/iomux-mx8.h | 645 + 1 file changed, 645 insertions(+) create mode 100644 arch/arm/mach-imx/include/mach/iomux-mx8.h diff --git a/arch/arm/mach-imx/include/mach/iomux-mx8.h b/arch/arm/mach-

[PATCH v5 41/54] ARM: cache: Remove unused cache ops struct

Remove what appears to be a leftover from moving ARMv8 cache function into a separate file that happened in 4b57aae26 ("ARM: Create own cache.c file for aarch64") Signed-off-by: Andrey Smirnov --- arch/arm/cpu/cache.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/cpu/cache.c b/arch

[PATCH v5 10/54] clock: Add i.MX8MQ clock driver

From: Sascha Hauer This is based on Lucas' patch sent as "[PATCH v2 4/4] clk: imx: add clock driver for i.MX8MQ CCM" to the mailing list. It will likely need some rework before it is finally merged, so apply the reworks here before merging into barebox. Signed-off-by: Sascha Hauer [andrew.smir

[PATCH v5 45/54] ARM: mmu64: Make use of create_table()

Make use of create_table() instead of calling xmemalign() and memset() explicitly. Signed-off-by: Andrey Smirnov --- arch/arm/cpu/mmu_64.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/arch/arm/cpu/mmu_64.c b/arch/arm/cpu/mmu_64.c index 80cf240d3..820d8cf75 100644 --- a

[PATCH v5 35/54] Kbuild: Add $(quote)

From: Sascha Hauer Signed-off-by: Sascha Hauer --- scripts/Kbuild.include | 1 + 1 file changed, 1 insertion(+) diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include index f3771902b..512d21732 100644 --- a/scripts/Kbuild.include +++ b/scripts/Kbuild.include @@ -3,6 +3,7 @@ # Convenie

[PATCH v5 30/54] clocksource: armv8-timer: Make use of postcore_platform_driver()

Signed-off-by: Andrey Smirnov --- drivers/clocksource/armv8-timer.c | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/clocksource/armv8-timer.c b/drivers/clocksource/armv8-timer.c index 5e0b9ef3c..918232e0e 100644 --- a/drivers/clocksource/armv8-timer.c +++ b/drive

[PATCH v5 40/54] ARM: mmu: Make use of dsb() and isb() helpers

Signed-off-by: Andrey Smirnov --- arch/arm/cpu/mmu_64.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/mmu_64.h b/arch/arm/cpu/mmu_64.h index c280d2ced..2cbe72062 100644 --- a/arch/arm/cpu/mmu_64.h +++ b/arch/arm/cpu/mmu_64.h @@ -28,7 +28,7 @@ static inline v

[PATCH v5 31/54] Port from U-Boot

Signed-off-by: Andrey Smirnov --- include/linux/iopoll.h | 69 ++ 1 file changed, 69 insertions(+) create mode 100644 include/linux/iopoll.h diff --git a/include/linux/iopoll.h b/include/linux/iopoll.h new file mode 100644 index 0..6e8a6fd71 --- /

[PATCH v5 26/54] pinctrl: i.MX: Add support for i.MX8

Signed-off-by: Andrey Smirnov --- arch/arm/mach-imx/include/mach/iomux-v3.h | 9 drivers/pinctrl/imx-iomux-v3.c| 56 --- 2 files changed, 59 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-imx/include/mach/iomux-v3.h b/arch/arm/mach-imx/include/mac

[PATCH v5 25/54] ARM: i.MX: xload-esdhc: Add support for i.MX8

Signed-off-by: Andrey Smirnov --- arch/arm/mach-imx/include/mach/xload.h | 1 + arch/arm/mach-imx/xload-esdhc.c| 33 ++ 2 files changed, 34 insertions(+) diff --git a/arch/arm/mach-imx/include/mach/xload.h b/arch/arm/mach-imx/include/mach/xload.h index 4e38ac7e2

[PATCH v5 19/54] clocksource: armv8-timer: Convert explicit assembly into helpers

Move inline assembly related to querying counter value as well as getting and setting counter frequency register into asm/system.h as well as converting it inot helper functions. This is done to make the code availible to other parts of the system. Signed-off-by: Andrey Smirnov --- arch/arm/incl

[PATCH v5 22/54] ARM: boot: Add trivial i.MX8 support

It appears that boot sources for i.MX8 are just a subset of those of i.MX7 and both can be handled by the same code. Signed-off-by: Andrey Smirnov --- arch/arm/mach-imx/boot.c | 5 + arch/arm/mach-imx/include/mach/generic.h | 2 ++ 2 files changed, 7 insertions(+) diff --git

[PATCH v5 23/54] ARM: i.MX: xload-esdhc: Rework to make code be less i.MX6-specific

Convert imx6_esdhc_start_image() into a generic esdhc_start_image() by making accept already filled "struct esdhc" as well as use esdhc_read_blocks(). With that change, create new imx6_esdhc_start_image() whose sole task is to properly fill a struct esdhc with appropriate offset and to pass it on

[PATCH v5 15/54] ARM: i.MX: Split shared CCM code into a separate file

Both i.MX8 and i.MX7 have similar CCMs, so move any code that can be shared into a separate file. Signed-off-by: Andrey Smirnov --- arch/arm/mach-imx/include/mach/ccm.h | 20 +++ .../arm/mach-imx/include/mach/imx7-ccm-regs.h | 16 +-- 2 files changed, 21 inse

[PATCH v5 14/54] ARM: i.MX: ocotp: Add i.MX8MQ support

From: Sascha Hauer Signed-off-by: Sascha Hauer [andrew.smir...@gmail.com: Rebased to account for move to nvmem] Signed-off-by: Andrey Smirnov --- drivers/nvmem/Kconfig | 2 +- drivers/nvmem/ocotp.c | 11 +++ 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/nvmem/

[PATCH v5 18/54] ARM: Add constants and helpers for system counter interface

Add constants and helpers for system counter interface as can be found in section "I1.3 Generic Timer registers" of "ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture" Signed-off-by: Andrey Smirnov --- arch/arm/include/asm/syscounter.h | 24 1 file change

[PATCH v5 27/54] Documentation: imx: Change block size for 'dd' to 1024

Real image starts at offset 0x400 (1024), so we can skip copying extra 512 bytes of zeros. Signed-off-by: Andrey Smirnov --- Documentation/boards/imx.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/boards/imx.rst b/Documentation/boards/imx.rst index 343643cd

[PATCH v5 20/54] ARM: i.MX8: Initialize system counter

Add code to properly initialize system counter, so it would be posible to get accurate time delays. Signed-off-by: Andrey Smirnov --- arch/arm/mach-imx/imx8mq.c | 19 +++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/mach-imx/imx8mq.c b/arch/arm/mach-imx/imx8mq.c index

[PATCH v5 06/54] mci: imx-esdhc: use dma mapping functions

From: Sascha Hauer Rather than relying on the fact that addresses can be just casted into DMA addresses use proper DMA mapping functions. This fixes compiler warnings when we do DMA on this 32bit only device on aarch64 SoCs. Signed-off-by: Sascha Hauer --- drivers/mci/imx-esdhc.c | 53 +++

[PATCH v5 12/54] mmc: i.MX esdhc: Add i.MX8 support

From: Sascha Hauer Signed-off-by: Sascha Hauer --- drivers/mci/imx-esdhc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c index 8929901d4..c4daa9d12 100644 --- a/drivers/mci/imx-esdhc.c +++ b/drivers/mci/imx-esdhc.c @@ -728,6 +728,7 @@ stat

[PATCH v5 05/54] Include our own include/dt-bindings

From: Sascha Hauer Allow to use dt-bindings files that are not yet upstreamed. They can be put into include/dt-bindings. Signed-off-by: Sascha Hauer --- arch/mips/dts/include/dt-bindings | 1 - scripts/Makefile.lib | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) delete mode

[PATCH v5 07/54] net: fec_imx: remove unnecessary DMA sync ops

From: Sascha Hauer The fec receive buffers are coherently mapped, no need to dma_sync on them. Signed-off-by: Sascha Hauer --- drivers/net/fec_imx.c | 4 1 file changed, 4 deletions(-) diff --git a/drivers/net/fec_imx.c b/drivers/net/fec_imx.c index d506fd64f..33599dd82 100644 --- a/driv

[PATCH v5 08/54] net: fec_imx: Use dma mapping functions

From: Sascha Hauer Rather than doing DMA on the input buffer address get a proper DMA address from the mapping functions. Signed-off-by: Sascha Hauer --- drivers/net/fec_imx.c | 15 +-- drivers/net/fec_imx.h | 1 + 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/dr

[PATCH v5 00/54] ARM: i.MX8MQ and EVK support

Everyone: Picking up where Sascha left off, this is the next version of the patchset that adds support for i.MX8MQ EVK board. This patchest is also availible at: https://github.com/ndreys/barebox/tree/imx8m-support-v5 Changes since [v4]: - Fix a critical OCOTP bug (missing .format_mac in "

[PATCH v5 09/54] net: fec_imx: Make use of IS_ALIGNED

Signed-off-by: Andrey Smirnov --- drivers/net/fec_imx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/fec_imx.c b/drivers/net/fec_imx.c index 0ca594082..98711baa7 100644 --- a/drivers/net/fec_imx.c +++ b/drivers/net/fec_imx.c @@ -467,7 +467,7 @@ static int fec_se

[PATCH 14/14] VFxxx: DCD: Remove read leveling and gate training delays

Read leveling delays are being specified as zero, so they are as good as disabled and can be safely dropped. Gate training delay is specified as 4/128 tCK for both data slices. This setting, when applied to Data Byte 1, makes that slice unusable* during POR startup which is somehow is mitigated by

[PATCH 11/14] VFxxx: DCD: Remove CR151 initialization

CR151 contains parameters specific to HW gate training and read leveling which are not an officially supported featre of the HW. Signed-off-by: Andrey Smirnov --- .../include/mach/flash-header/vf610-ddr-cr-default.imxcfg| 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/mach-im

[PATCH 13/14] VFxxx: DCD: Remove CR97, CR98 and CR99

There's no point enabling write leveling DQS adjustement, while setting offsets for both slices to zero. This code is effectively a no-op, so drop it. Signed-off-by: Andrey Smirnov --- .../include/mach/flash-header/vf610-ddr-cr-default.imxcfg | 3 --- 1 file changed, 3 deletions(-) diff --

[PATCH 05/14] VFxxx: Add common DCD header for common DDR configuration

A number of VFxxx boards copy DDR layout/design of vf610-twr board and they all share DDR settings. Move those settings to a common file to avoid code duplication. Signed-off-by: Andrey Smirnov --- .../flash-header-vf610-twr.imxcfg | 83 +- .../flash-header-zii-vf610-dev

[PATCH 10/14] VFxxx: Reconcile shared DDR IOMUX DCD with schematic

The only differential signals coming out of DDRMC to the memory chip are CLK, DQS0 and DQS1. There rest of the pins are not, so there should be no reason to configure them as such. Signed-off-by: Andrey Smirnov --- .../vf610-iomux-ddr-default.imxcfg| 38 +-- 1 file ch

[PATCH 12/14] VFxxx: DCD: Drop initialization of CR139 - CR148

All of those registers contain paramters applicable only to write leveling, gate training and read leveling procedures. They should have no effect on normal mode of operations, so remove them from the common settings file. Signed-off-by: Andrey Smirnov --- .../include/mach/flash-header/vf610-ddr

[PATCH 08/14] VFxxx: zii-vf610-dev: Drop most custom DDRMC DCD code

Both zii-vf610-dev and vf610-twr boards have same DDR layout. Since provenance of those custom settings is unclear, drop them in favor of what vf610-twr board does. Signed-off-by: Andrey Smirnov --- .../zii-vf610-dev/flash-header-zii-vf610-dev.imxcfg | 8 1 file changed, 8 deletio

[PATCH 07/14] VFxxx: Reconcile shared DDR DCD with memory datasheet

Some of the settings for VFxxx boards appear to be in violation of the parameters specified by DDR chip's datasheet, so fix the code to reconcile the differences. The changes are: In vf610-ddr-cr-default.imxcfg: - CR31: t_XSDLL is 468, should be 512 - CR161 t_ODTH8 (R & W) is 2, should be 6

[PATCH 09/14] VFxxx: Initialize IOMUXC_DUMMY_DDRBYTE1/2 in default DDR DCD

Although upstream U-Boot does not initialize this register in vf610-twr code (it does so in code for Phytec's PCM052) multiple revisions of VFxxx Controller Reference Manual state: 5.2.6.1 DUMMY PADS (DDR/QuadSPI) There are two dummy pads that are useful for timing calibration of DDR.

[PATCH 04/14] VFxxx: Add common header for DDR clock setting DCD

VFxxx support code in Barebox is written assuming a particular clock setup in mind and all of the supported boards use it. Move the DCD code responsible for that setup to a shared file to avoid code duplication. Signed-off-by: Andrey Smirnov --- .../flash-header-vf610-twr.imxcfg | 49

[PATCH 06/14] VFxxx: Reconcile shared DDR DCD configuration with U-Boot

U-Boot was originally used as a source of DCD for VFxxx, so update our settings against latest upstream (sha1: b8aa55cb6414e512cce30bb7db3268eea934466d) to reconcile the differences. Signed-off-by: Andrey Smirnov --- .../zii-vf610-dev/flash-header-zii-vf610-dev.imxcfg | 1 - .../include/ma

[PATCH 03/14] VFxxx: Add common DDR PHY DCD header

A number of VFxxx boards copy DDR layout/design of vf610-twr board and they all share DDR PHY settings. Move those settings to a common file to avoid code duplication. Signed-off-by: Andrey Smirnov --- .../flash-header-vf610-twr.imxcfg | 27 +--- .../flash-header-zii-vf610-de

[PATCH 02/14] VFxxx: Add common header for DDR IOMUX DCD configuration

A number of VFxxx boards copy DDR layout/design of vf610-twr board and they all share IOMUX settings. Move those settings to a common file to avoid code duplication. Signed-off-by: Andrey Smirnov --- .../flash-header-vf610-twr.imxcfg | 52 +--- .../flash-header-zii-vf610-

[PATCH 01/14] VFxxx: Remove stale code from DCD files

Remove various bits of debug code, commented DCD commands and separators as a small clean-up in preparation for commits that would follow. Signed-off-by: Andrey Smirnov --- .../flash-header-vf610-twr.imxcfg | 34 - .../flash-header-zii-vf610-dev.imxcfg | 37 --

[PATCH 00/14] VFxxx DCD fixes and improvements

Everyone: This series is the result of investigation into DDR failures on a ZII VF610 Dev derivative design. It mostly code sharing changes, cleanups and some fixes and a nasty DCD hack removal. All of the changes are limited to VFxxx and shouldn't affect any other supported SoCs. Feedback is wel

[PATCH 6/6] ARM: i.MX: zii-vf610-spu3: Add support for BBU on eMMC

Signed-off-by: Andrey Smirnov --- arch/arm/boards/zii-vf610-dev/board.c | 18 ++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/boards/zii-vf610-dev/board.c b/arch/arm/boards/zii-vf610-dev/board.c index 6fd49df54..c90644b04 100644 --- a/arch/arm/boards/zii-vf610-dev/boar

[PATCH 4/6] ARM: i.MX: bbu: Use pr_* functions for output

Use pr_* function family for all of the logging in the file both for consistency with the rest of the code and to make all of the output be properly tagged with loglevel information. Signed-off-by: Andrey Smirnov --- arch/arm/mach-imx/imx-bbu-internal.c | 30 ++-- 1 file

[PATCH 2/6] ARM: i.MX: bbu: Replace magic number with a constant

Signed-off-by: Andrey Smirnov --- arch/arm/mach-imx/imx-bbu-internal.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/imx-bbu-internal.c b/arch/arm/mach-imx/imx-bbu-internal.c index 4655bdcc3..07a26f25a 100644 --- a/arch/arm/mach-imx/imx-bbu-internal.c +++

[PATCH 1/6] ARM: i.MX: bbu: Alias identical functions

Some BBU functions for i.MX53 and i.MX6 are identical, so declare the latter as an alias for former to avoid code duplication. Signed-off-by: Andrey Smirnov --- arch/arm/mach-imx/imx-bbu-internal.c | 31 ++-- 1 file changed, 6 insertions(+), 25 deletions(-) diff --git a/

[PATCH 3/6] ARM: i.MX: bbu: Share MMC code between i.MX51 and 53

Both functions do exactly the same thing with only difference being type of hanler they pass one. Convert the code to use a generic function accpeting handler as additional parameter. Signed-off-by: Andrey Smirnov --- arch/arm/mach-imx/imx-bbu-internal.c | 32 +++- 1 file

[PATCH 5/6] ARM: i.MX: bbu: Add support for MMC on VFxxx

Add support for MMC on VFxxx by providing an alias to imx6_bbu_internal_mmc_register_handler(). Signed-off-by: Andrey Smirnov --- arch/arm/mach-imx/imx-bbu-internal.c | 7 +++ arch/arm/mach-imx/include/mach/bbu.h | 9 + 2 files changed, 16 insertions(+) diff --git a/arch/arm/mach-im

[PATCH 0/6] i.MX BBU improvements and VFxxx support

Everyone: This small series is the result of work on implementing BBU support for VFxxx (ZII VF610 Dev board specifically). Hopefully all of the patches are self-explanatory. Feedback is wellcome! Thanks, Andrey Smirnov Andrey Smirnov (6): ARM: i.MX: bbu: Alias identical functions ARM: i.MX

Re: [PATCH v4 53/54] ARM: i.MX8: Add i.MX8mq EVK support

On Mon, Jun 11, 2018 at 10:49 PM Holger Schurig wrote: > > > +result int the following files: > > "int the" -> "in the" > > > > > +The NXM i.MX8MQ EVK Evaluation Board has has two switches responsible > > "has has" -> "has" Oops, my bad. Will fix in v5. Thanks, Andrey Smirnov __

Re: [PATCH v4 53/54] ARM: i.MX8: Add i.MX8mq EVK support

On Mon, Jun 11, 2018 at 7:58 PM Fabio Estevam wrote: > > Hi Andrey, > > On Mon, Jun 11, 2018 at 10:53 PM, Andrey Smirnov > wrote: > > > + pinctrl_fec1_data_tx: fec1datatxgrp { > > + pinmux = < > > + MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 > > +

Re: Device-tree node renames break barebox/kernel compatibility...

On Tue, 12 Jun 2018 14:47:38 +0200 Sascha Hauer wrote: > Hi David, > > On Tue, Jun 12, 2018 at 02:23:08PM +0200, David Jander wrote: > > > > Hi Sascha, > > > > I know this is old already, and I was surprised that I couldn't find any > > complaints about this yet, but I recently came across thi

Re: [PATCH v2] ARM: VFxxx: Record cpu boot source as a part of startup

On Wed, May 2, 2018 at 3:27 AM Sascha Hauer wrote: > > On Mon, Apr 30, 2018 at 11:47:14PM -0700, Andrey Smirnov wrote: > > Signed-off-by: Andrey Smirnov > > --- > > > > Same as original patch, but with fixed subject line. > > > > arch/arm/mach-imx/vf610.c | 2 ++ > > 1 file changed, 2 insertions

Re: Device-tree node renames break barebox/kernel compatibility...

Hi David, On Tue, Jun 12, 2018 at 02:23:08PM +0200, David Jander wrote: > > Hi Sascha, > > I know this is old already, and I was surprised that I couldn't find any > complaints about this yet, but I recently came across this patch in the > kernel: > > https://git.kernel.org/pub/scm/linux/kerne

Device-tree node renames break barebox/kernel compatibility...

Hi Sascha, I know this is old already, and I was surprised that I couldn't find any complaints about this yet, but I recently came across this patch in the kernel: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/patch/?id=df5cc9d0b42d15fa33b30440cca7a11ca7ba35a4 ...which was