On Thu, Jan 31, 2019 at 03:50:28PM +0300, Peter Mamonov wrote:
> On Thu, Jan 31, 2019 at 01:54:52PM +0300, Peter Mamonov wrote:
> > Hello, Andrey,
> >
> > > In order to allow access to second half of address space on 64-bit
> > > machines, add code that creates /dev/highmem dedicated for that.
> >
On Thu, Jan 31, 2019 at 05:19:05PM +, Ian Abbott wrote:
> dwc_ether_send() sets the SIZE1 field of the TX descriptor incorrectly.
> It sets the SIZE1 field to a bit-wise OR of the old value and the new
> value. If the old value differs from the new value, the transmitted
> Ethernet frame will
On Wed, Jan 30, 2019 at 04:48:47PM +0100, Lucas Stach wrote:
> This is a rework of the i.MX8M firmware handling to make it easier to
> integrate with external build systems.
>
> For a simple compile test there is no need to have the real firmware
> files available, but some dummy files will do:
>
On Tue, Jan 29, 2019 at 05:30:50PM -0800, Andrey Smirnov wrote:
>
> Signed-off-by: Andrey Smirnov
> ---
Applied, thanks
Sascha
>
> Changes since [v1]:
>
> - Added a comment explaining the reasoning "a" specifier is
> missing
>
> [v1] http://lists.infradead.org/pipermail/barebox/20
Port of a Linux commit
Introduce driver data struct. This will simplify handling of device
specific differences.
Signed-off-by: Stefan Agner
[andrew.smir...@gmail.com reformatted drvdata, to simplify future diffs]
Signed-off-by: Andrey Smirnov
Reviewed-by: Lucas Stach
Cc: Bjorn
Port of a Linux commit 34be9b453608fa4475d2b48ee27df2023f08ef2d
Add bits and pieces needed to support IP block variant found on
i.MX8MQ SoCs.
Cc: p.za...@pengutronix.de
Cc: Fabio Estevam
Cc: cphe...@gmail.com
Cc: l.st...@pengutronix.de
Cc: Leonard Crestez
Cc: "A.s. Dong"
Cc:
Port of a Linux commit
PCIE PHY IP block on i.MX7D differs from the one used on i.MX6 family,
so none of the code in current implementation of imx6_setup_phy_mpll()
is applicable.
Tested-by: Trent Piepho
Signed-off-by: Andrey Smirnov
Reviewed-by: Lucas Stach
Cc: Bjorn Helgaas
Signed-off-by: Andrey Smirnov
---
drivers/reset/reset-socfpga.c| 2 +-
include/linux/reset-controller.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c
index b6faa0217..9b499f23c 100644
--- a/drivers/reset/re
Import dt-bindings/reset/imx8mq-reset.h from Liunx kernel until that
file trickles down into dts/include/.
Signed-off-by: Andrey Smirnov
---
include/dt-bindings/reset/imx8mq-reset.h | 64
1 file changed, 64 insertions(+)
create mode 100644 include/dt-bindings/reset/imx8
Port of a Linux commit
Add code needed to support i.MX8MQ variant.
Signed-off-by: Andrey Smirnov
Cc: bhelg...@google.com
Cc: Fabio Estevam
Cc: cphe...@gmail.com
Cc: l.st...@pengutronix.de
Cc: Leonard Crestez
Cc: "A.s. Dong"
Cc: Richard Zhu
Cc: linux-...@nxp.com
Cc: lin
Port of a Linux commit
Both i.MX7D and i.MX8MQ have the same behaviour when it comes to
clearing DIRECT_SPEED_CHANGE bit when no speed change occur. To
account for that change the code handling that to use a generic flag
instead of checking IP block variant.
Signed-off-by: Andrey Smirn
Port of a Linux commit cffaab878178c7842ab38690070d665adb3f41fd
In order to enable supporting i.MX8MQ with this driver, convert it to
expect variant specific bits to be passed via driver data.
Cc: p.za...@pengutronix.de
Cc: Fabio Estevam
Cc: cphe...@gmail.com
Cc: l.st...@pengutronix.
Port of a Linux commit fea88b2b80ab7a01982a6494ea8e8099cddc7b38
gpcv2 driver is NOT just used on i.MX7D which has Cortex-A7
cores, but also on i.MX8MQ/i.MX8MM platforms which use Cortex-A53
cores, so let's use A_CORE instread of A7 to avoid confusion.
Signed-off-by: Anson Huang
Acked-b
Casting to u32 works well on 32-bit builds, but causes problem when
compiled on 64-bit machines. Switch it to cast to "unsigned long", so
that it would have appropriate width in both cases.
While at it, replace explicit casts to void * with IOMEM.
Signed-off-by: Andrey Smirnov
---
drivers/pci/p
Port of a Linux commit 685efffe37c921cf1d56dd3c8617dc67bc343a99
The GPCv2 on the Freescale i.MX8MQ SoC works in the same way as the
GPCv2 on the i.MX7, but only controls more power domains with a
different mapping.
Signed-off-by: Lucas Stach
Acked-by: Rob Herring
Signed-off-by: Shaw
Port of a Linux commit 8d8e3b7d8f06f69005d829d4a195b00ef976004b
Adopt the SPDX license identifier headers to ease license compliance
management.
Signed-off-by: Fabio Estevam
Signed-off-by: Shawn Guo
Signed-off-by: Andrey Smirnov
---
drivers/soc/imx/gpcv2.c | 8 +---
1 file change
Port of a Linux commit 73f59712a1a3e532a2cbfe582ecfdbf56c33297d
i.MX8MQ and i.MX8MM share same gpc module with i.MX7D, they
can reuse gpcv2 pgc driver for power domain control, this
patch renames all functions and structure definitions started
with "imx7" to "imx", and use .data in imx_gpc
Everyone:
This series contains port of the various Linux patches needed to
enable support of PCIE IP block on i.MX8MQ SoCs. Last four patches are
marked as RFC since correpsonding Linux series hasn't been picked into
PCI tree yet [pcie-imx8mq]. However all of the code should be in good
enough shap
Port of a Linux commit a800f418420d37f60fa471665a156c45d2702437
So we can add i.MX8M support without introducing name clashes.
Signed-off-by: Lucas Stach
Signed-off-by: Shawn Guo
Signed-off-by: Andrey Smirnov
---
drivers/soc/imx/gpcv2.c | 44 -
1
Add PCI fixups section to linker script, so it would be possible to
enable PCI support.
Signed-off-by: Andrey Smirnov
---
arch/arm/lib64/barebox.lds.S | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/lib64/barebox.lds.S b/arch/arm/lib64/barebox.lds.S
index 08adc44e8..b3
On Thu, Jan 31, 2019 at 2:55 AM Peter Mamonov wrote:
>
> Hello, Andrey,
>
> > In order to allow access to second half of address space on 64-bit
> > machines, add code that creates /dev/highmem dedicated for that.
> >
> > Note that due to maximum file size being limited to MAX_LFS_FILESIZE
> > or
dwc_ether_send() sets the SIZE1 field of the TX descriptor incorrectly.
It sets the SIZE1 field to a bit-wise OR of the old value and the new
value. If the old value differs from the new value, the transmitted
Ethernet frame will be longer than it should be and is likely to have an
incorrect frame
The imx-atf build target is called imx8mq, so to avoid any renaming
look for a ATF binary of the same name.
---
arch/arm/boards/nxp-imx8mq-evk/lowlevel.c | 2 +-
firmware/Makefile | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boards/nxp-imx
On Thu, Jan 31, 2019 at 01:54:52PM +0300, Peter Mamonov wrote:
> Hello, Andrey,
>
> > In order to allow access to second half of address space on 64-bit
> > machines, add code that creates /dev/highmem dedicated for that.
> >
> > Note that due to maximum file size being limited to MAX_LFS_FILESIZ
Hi Kai,
On Thu, Jan 31, 2019 at 11:47:54AM +0100, Kai Volkmar wrote:
> On 31.01.19 00:35, Andrey Smirnov wrote:
> > On Wed, Jan 30, 2019 at 11:26 AM Kai Volkmar wrote:
> thanks for your quick answer. I'm not familiar with git bisect yet, but
> I just identified the last working and the first defe
Hello, Andrey,
> In order to allow access to second half of address space on 64-bit
> machines, add code that creates /dev/highmem dedicated for that.
>
> Note that due to maximum file size being limited to MAX_LFS_FILESIZE
> or 0x7fff___ bytes at addresses 0x7fff___ and
>
On 31.01.19 00:35, Andrey Smirnov wrote:
> On Wed, Jan 30, 2019 at 11:26 AM Kai Volkmar wrote:
>> Hi everyone,
>>
>> I tried to renew the barebox of an EDB9302 by 2019.01.0.
>> I used to load the new image by bootm command of the old version which
>> worked fine in at least 2018.01.0:
>>
>> Lo
On Wed, 30 Jan 2019 07:11:19 +0100, Sascha Hauer wrote:
> Hi Thomas,
>
> On Tue, Jan 29, 2019 at 11:13:36AM +0100, thomas.haemmerle1...@gmail.com
> wrote:
> > From: Thomas Haemmerle
> >
> > macb supports Xilinx ZynqMP GEM, so select HAS_MACB by default.
>
> I think this should be solved by 5
>Среда, 30 января 2019, 12:35 +03:00 от Sascha Hauer :
>> >> >> I decided to change the size of the UBI volume for the root file
>> >> >> system to 60 MB.
>> >> >> Now I get a weird OOM error. Turning on debug information shows a
>> >> >> conflict,
>> >> >> but I do not quite understand where to
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