Some USB memory sticks not (fully) recognized

2020-08-06 Thread Christian Eggers
Barebox version: 2020.07.0 Hardware: i.MX6 ULL with external Microchip USB Hub attached I got a bug report that some newer USB memory sticks do not work with barebox. While with barebox-2020.01 these devices are not recognized at all, in barebox-2020.07 I get at least some warnings: # usb > usb:

Re: [PATCH v2 2/2] ARM: i.MX: Add atlascopco sxb board

2020-08-06 Thread Marco Felsch
On 20-08-04 23:41, Anees Rehman wrote: ... > +static noinline void imx7d_sxb_sram_setup(void) > +{ > + int ret; > + > + relocate_to_current_adr(); > + setup_c(); > + > + pr_debug("configuring ddr...\n"); > + write_regs(imx7d_ixb_dcd, ARRAY_SIZE(imx7d_ixb_dcd)); > + > + ret

[PATCH 1/3] ARM: i.MX6 dtsi: add enet_out clock

2020-08-06 Thread Marco Felsch
The barebox fec driver supports enet_clk out since commit 2de277264c ("i.MX: fec: Enable all clocks specified for FEC") but unfortunately this clock is not specified upstream. Enable it here till we can use it from upstream to make it clear that IMX6QDL_CLK_ENET_REF should be used as enet_out clock

[PATCH 2/3] ARM: imx6ul: add fec bits to GPR syscon definition

2020-08-06 Thread Marco Felsch
The commit is based on linux commit: 8<--- commit 9f55eb92441883a1afca48dc8d32bf62c4d8e833 Author: Fugang Duan Date: Tue Jul 28 15:30:39 2015 +0800 ARM: imx6ul: add fec bits to GPR syscon definition FEC requires additional bits to

[PATCH 3/3] ARM: i.MX: setup ENET_CLK_SEL in imx6_init for every imx6q/imx6d

2020-08-06 Thread Marco Felsch
Setup the ENET TX reference clk to get it from the internal clock from anatop. This is the default value for newer imx6 processors like: 6sx, 6ul, 6ull. So it should be safe to set it as default for imx6q/d too. It will be output on the pad if ENET_REF_CLK is muxed which can be used to clock a phy