Fix conditional statements ("if" , "elif", "while" and "until") exit
code when used in scripts. Before the change, when conditional statement
evaluated false just before the end of the script, script's exit code
would have been 1 (instead of 0), which implies error condition. This is
not expected n
Move the usbgadget parse() function to file_list and rename it to
file_list_parse_null() which will return a NULL pointer instead of an
error. Also adjust the callers in the usbgadget code.
Signed-off-by: Rouven Czerwinski
---
v2: rebase on master to fix USB mass storage conflict
---
common/fil
In case an invalid file list is passed to file_list_parse(), it will
return an error, i.e. by passing "/dev/mmc1(emmc) /dev/mmc1.1(root)",
the error here being that the entries are not comma separated and
file_list_parse will try to parse ' ' as a flag. The fastboot code
didn't handle this, leading
Hi Renaud,
On Mon, Aug 02, 2021 at 11:40:03AM +0100, Renaud Barbier wrote:
> Add the NXP IFC nand driver support. This driver
> can be used with the NXP QorIQ cores.
Could you leave a few words here which base you used for the driver? Is
it based on Linux or U-Boot, which version?
> +static void
On Fri, Jun 11, 2021 at 10:02:33AM +0200, Steffen Trumtrar wrote:
> The commit a9b2e6089d82686564220013f14e9f0ffcc725e2 allowed generating
> everything needed in one step. This was however a bit too ambitious.
> The script now requires that the Altera Embedded SDK is always
> installed. There are s
On Mon, Jul 05, 2021 at 06:04:57PM +0200, Michael Riesch wrote:
> The RK3568 EVB uses a voltage divider to determine the hardware ID of
> the board. At the moment, the voltage levels for seven EVB variants are
> defined. This commit adds a late_initcall to the board code that reads
> out the voltag
On Wed, Jul 21, 2021 at 10:43:04AM +0200, Rouven Czerwinski wrote:
> On Wed, 2021-07-21 at 10:40 +0200, Rouven Czerwinski wrote:
> > In case an invalid file list is passed to file_list_parse(), it will
> > return an error, i.e. by passing "/dev/mmc1(emmc) /dev/mmc1.1(root)",
> > the error here bein
On Thu, Jul 22, 2021 at 02:41:37PM +0200, Ahmad Fatoum wrote:
> Addition of first stage support for SAMA5D3 added a dependency
> between sama5d2 and sama5d3 first stages: They both needed to be
> enabled to generate images for either. Break up this dependency
> to fix build failures for configs tha
On Fri, Jul 30, 2021 at 09:28:02PM +0200, Uwe Kleine-König wrote:
> Converts the files that licensecheck can determine to be licensed under
> GPL-2.0-only or GPL-2.0-or-later and also convert their copyright
> statements to SPDX.
>
> Signed-off-by: Uwe Kleine-König
> ---
Applied, thanks
Sascha
On Fri, Jul 30, 2021 at 09:00:01AM +0200, Uwe Kleine-König wrote:
> En passant this adds support for PBL_BREAK. While there is no 64 bit
> support available for mvebu, keeping the difference between
> arch/arm/mach-mvebu/include/mach/barebox-arm-head.h and
> arch/arm/include/asm/barebox-arm-head.h
On Thu, Aug 05, 2021 at 04:06:42PM +0200, Ahmad Fatoum wrote:
> On 03.08.21 11:44, Rouven Czerwinski wrote:
> > Use the information from the reserved memory entries to modify the
> > mapping of memory regions to mark them as uncachable and not-executable.
> > This also prevents the processor from s
On Tue, Aug 03, 2021 at 11:44:11AM +0200, Rouven Czerwinski wrote:
> If the OF_RESERVE_ENTRY_FLAG_XN flag is passed while creating the
> entry, a subsequent commit will use this information in the mmu to map
> the area as non-executable.
Do we need this flag at all? I can't find any place changed
On Tue, Aug 03, 2021 at 06:59:36PM +0200, Ahmad Fatoum wrote:
> With fsl,ext-reset-output and WDOG_B muxed correctly, the i.MX watchdog
> will toggle an external signal to effect a PMIC reset.
>
> That's good for normal use, but when exchanging information with the
> BootROM over GPRs, a warm rese
On Thu, Aug 05, 2021 at 10:26:07AM +0200, Rouven Czerwinski wrote:
> Since commit 56ca2c197e71 ("mci: sdhci: Get rid of many register ops")
> the core checks whether there is an explicit write function for the
> host. If the struct is not zero initialized, a bogus value is taken as
> the function,
On Thu, Aug 05, 2021 at 05:22:51PM +0200, Uwe Kleine-König wrote:
> From: Uwe Kleine-Koenig
>
> The i.MX8MP uses a protocol similar to the MXS. The relevant differences
> are:
>
> - Maximal transfer size is 1020
> - HID reports must be sent to EP1 instead of using a control transfer
> - The F
On Fri, Aug 06, 2021 at 11:33:37AM +0200, Marco Felsch wrote:
> The bareboxenv behviour is different if used as host-tool. As host-tool
> the erase is skipped which can confuse the user. Add a help note as hot
> fix. In the long term we should add the host-tool erase support as well.
>
> Signed-of
On 02.08.21 12:40, Renaud Barbier wrote:
> In preparation for the introduction of the FSL IFC nand driver
> for the layerscape CPU, add 64-bit counter support.
>
> Remove functions calling undefined functions.
>
> Signed-off-by: Renaud Barbier
> ---
> include/asm-generic/atomic-long.h | 63
Hi,
On 29.07.21 11:48, Denis Osterland-Heim wrote:
> Hi,
>
> Am Donnerstag, den 29.07.2021, 11:22 +0200 schrieb Ahmad Fatoum:
>> On 28.07.21 11:38, Denis Osterland-Heim wrote:
>>> Hi,
>>>
>>> Am Mittwoch, den 28.07.2021, 10:56 +0200 schrieb Ahmad Fatoum:
>>>
I talked with Sascha once before
Hello Renaud,
On 02.08.21 12:40, Renaud Barbier wrote:
> Set the NAND timings and enable the IFC NAND driver.
>
> Signed-off-by: Renaud Barbier
> ---
> arch/arm/boards/ls1046ardb/board.c| 42 +++
> arch/arm/configs/layerscape_defconfig | 11 +++
> 2 files changed
On 05.08.21 17:32, Ahmad Fatoum wrote:
> On 03.08.21 18:59, Ahmad Fatoum wrote:
>> The i.MX8MM reference manual follows long established tradition in not
>> documenting BootROM magic reboot codes. For older i.MX variants, the
>> values can be seen in the bmode tables of Freescale's U-Boot patches.
20 matches
Mail list logo
