On Thu, 07 Nov 2024 08:23:29 +0100, Sascha Hauer wrote:
> This series has some updates for the FS and TFTP code
>
>
Applied, thanks!
[1/4] fs: open loopback device before using it
https://git.pengutronix.de/cgit/barebox/commit/?id=89ecaaf3bb39 (link may
not be stable)
[2/4] fs: tftp: c
This adds support for the k3-udma found on TI K3 SoCs. The driver
uses the just added dma-device support. It's based on the corresponding
U-Boot code as of U-Boot-2025.01-rc1. The driver is needed for upcoming
ethernet support for TI AM625 SoCs.
Signed-off-by: Sascha Hauer
---
drivers/dma/Kconfi
This adds support for dma-devices (on Linux aka dmaengines) to barebox.
The code is based on U-Boot-2025.01-rc1.
The code consists of a shim wrapper layer around a struct dma_ops and
helper functions to retrieve the suitable dma_ops instance from the
devices tree based on standard dma properties.
>From the commit message adding the ringacc driver to Linux:
> The Ring Accelerator (RINGACC or RA) provides hardware acceleration to
> enable straightforward passing of work between a producer and a consumer.
> There is one RINGACC module per NAVSS on TI AM65x SoCs.
>
> The RINGACC converts const
This imports some U-Boot changes into the ti_sci driver. For upcoming
k3-udma driver we'll need ti_sci_get_by_phandle() and
devm_ti_sci_get_of_resource().
Signed-off-by: Sascha Hauer
---
drivers/firmware/ti_sci.c| 276 ---
drivers/firmware/ti_sci.h
This adds ethernet support for various TI K3 SoCs. The one we currently
care about is the AM625 where this driver was tested on. The code is
based on the U-Boot-2025.01-rc1 driver.
Signed-off-by: Sascha Hauer
---
drivers/net/Kconfig | 14 +-
drivers/net/Makefile | 1 +
driver
The davinci MDIO driver can be reused for the CPSW found on TI K3 SoCs
which needs a new ethernet driver. Separate the MDIO driver from the
CPSW driver to make it usable with other ethernet drivers.
Signed-off-by: Sascha Hauer
---
drivers/net/Kconfig| 5 ++
drivers/net/Makefile |
| 996
include/soc/ti/k3-navss-ringacc.h| 252 +++
include/soc/ti/ti-udma.h | 45 +
include/soc/ti/ti_sci_protocol.h | 38 +-
27 files changed, 7515 insertions(+), 230 deletions(-)
---
base-commit: 351a306c0d712a9f09032e26273f38ab9b38f35f
change-id: 20241108
We need phy_gmii_sel to be accessible as syscon. Add the syscon
compatible to make that possible.
Signed-off-by: Sascha Hauer
---
arch/arm/dts/k3-am625-beagleplay.dts | 1 +
arch/arm/dts/k3-am625.dtsi | 5 +
2 files changed, 6 insertions(+)
diff --git a/arch/arm/dts/k3-am625-beagl
On Fri, Nov 08, 2024 at 12:08:45PM +0100, Jules Maselbas wrote:
> Hi Sascha,
>
> On Fri Nov 8, 2024 at 11:39 AM CET, Sascha Hauer wrote:
> > Hi Jules,
> >
> > On Thu, Nov 07, 2024 at 03:57:19PM +0100, Jules Maselbas wrote:
> > > Clock driver adapted from Linux.
> > > The pll-cpux is set to 816MHz
Hello Holger,
Thanks for your fix.
On 08.11.24 11:57, Holger Assmann wrote:
> Besides its power domain, the NPU node itself also needs to be disabled
> in the kernel device tree if no respective hardware is present at the
> SoC.
>
> The power domain has already been dealt with by upstream commit
Hi Sascha,
On Fri Nov 8, 2024 at 11:39 AM CET, Sascha Hauer wrote:
> Hi Jules,
>
> On Thu, Nov 07, 2024 at 03:57:19PM +0100, Jules Maselbas wrote:
> > Clock driver adapted from Linux.
> > The pll-cpux is set to 816MHz and pll-periph0-2x is set to 1.2GHz.
>
> From which driver did you adapt this fr
Hi Renaud,
On Thu, Nov 07, 2024 at 01:42:18PM +, Renaud Barbier wrote:
> I have installed a NVME device on a LS1046A-RDB:
> `-- pci-1957:81c0.1
> `-- pci-126f:2263.0
>`-- 0x-0x6fc86d5fff ( 447.1 GiB): /dev/nvme0n1
>
> My barebox version is 2022.03
>
On Mon, 04 Nov 2024 14:04:23 +0100, Sascha Hauer wrote:
> During 1st stage boot barebox is running in OCRAM. This OCRAM is
> occupied by the TF-A once started, so move the handoff-data to SDRAM
> before starting the TF-A.
>
> Currently no board is using handoff-data from its early board code, so
On Thu, Nov 07, 2024 at 03:57:20PM +0100, Jules Maselbas wrote:
> sunxi pinctrl driver, adapted from Linux, is split in two parts:
> - pinctrl-sunxi.c that implements gpio, pinctrl and pinmux functions
> - pinctrl-sun50i-a64.c that declare sun50i pins and their functions.
>This file only requ
On Wed, 30 Oct 2024 15:59:59 +0100, Sascha Hauer wrote:
> On i.MX9 and some i.MX8 SoCs the barebox images are encapsulated in the
> i.MX flash header v3 format. This series adds support for detecting and
> chainloading them via bootm command.
>
>
Applied, thanks!
[1/2] filetype: detect i.MX f
Besides its power domain, the NPU node itself also needs to be disabled
in the kernel device tree if no respective hardware is present at the
SoC.
The power domain has already been dealt with by upstream commit
924101c81d6e ("ARM: i.MX8MP: add feature controller support for Plus").
This patch adds
Hi Jules,
On Thu, Nov 07, 2024 at 03:57:19PM +0100, Jules Maselbas wrote:
> Clock driver adapted from Linux.
> The pll-cpux is set to 816MHz and pll-periph0-2x is set to 1.2GHz.
>From which driver did you adapt this from? I tried copying
drivers/clk/sunxi-ng/ccu-sun50i-a64.c from Linux over your
On Thu, 07 Nov 2024 15:57:17 +0100, Jules Maselbas wrote:
> In the function clk_composite_round_rate a test for a NULL function pointer
> guard the call to the round_rate callback but doesn't check for the correct
> callback: it should be round_rate instead of set_rate
>
>
Applied, thanks!
[1
On Wed, 06 Nov 2024 19:57:18 +0100, Ahmad Fatoum wrote:
> This series resulted while getting OP-TEE to work on RK3399.
> There is no upstream OP-TEE support for the RK3568 or RK3588,
> but the expectation that loading the blob is analogous to the
> RK3399, which is fixed by this series.
>
> Ahma
On Wed, 06 Nov 2024 09:03:38 +0300, Alexander Shiyan wrote:
> The message "CONFIG_NAND_NEED_ECC_PLACEMENT_INTERLEAVED is disabled"
> is always issued, regardless of the MTD ECC layout used, since it
> is executed through "fallthrough" from the previous case statement.
>
> Additionally, if !IS_EN
On Thu, 07 Nov 2024 08:31:14 +0100, Sascha Hauer wrote:
> mailbox.h needs linux/list.h, so include it to make the file self
> contained. Also declare of_phandle_args.
>
>
Applied, thanks!
[1/1] mailbox: make mailbox.h self contained
https://git.pengutronix.de/cgit/barebox/commit/?id=8d4
On Thu, 07 Nov 2024 08:24:51 +0100, Sascha Hauer wrote:
> rdb_late_init() should only run on the appropriate machine. Check the
> machine before continuing.
>
>
Applied, thanks!
[1/1] ARM: Layerscape: ls1046ardb: add missing machine protection
https://git.pengutronix.de/cgit/barebox/com
On Thu, 07 Nov 2024 08:28:44 +0100, Sascha Hauer wrote:
> commit e64990099c8f ("debug_ll ns16550: Add base address argument to
> register functions") missed the change for k3. Add the change to fix
> k3 debug_ll support.
>
>
Applied, thanks!
[1/1] ARM: k3: fix debug_ll
https://git.pengu
On Thu, 07 Nov 2024 15:02:18 +0100, Stefan Kerkmann wrote:
> The checked in `sha256-core.S_shipped` assembly file has a thumb2
> specific workaround applied[1]. This fix wasn't backported to the perl
> script `sha256-armv4.pl` used to generate the assembly, thus when the
> script is run it would
On Thu, 31 Oct 2024 15:48:52 +0300, Abdelrahman Youssef wrote:
> while parsting the GPT header in alloc_read_gpt_entries() the number
> of partitions can be large that multiplying it with the size of a single
> partition overflows 32-bit multiplication.
>
> we already enforce a MAX_PARTITION lim
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