Re: [PATCH 1/2] clocksource: timer-ti-dm: replace magic constant with descriptive macros

2025-04-29 Thread Daniel Lezcano
On 29/04/2025 23:49, Ahmad Fatoum wrote: Hello Daniel, On 29.04.25 21:46, Daniel Lezcano wrote: On 29/04/2025 17:04, Sascha Hauer wrote: On Tue, 29 Apr 2025 15:25:49 +0200, Ahmad Fatoum wrote: This improves readability a bit, but introduces no functional change. Applied, thanks! I'm a

Re: [PATCH 1/2] clocksource: timer-ti-dm: replace magic constant with descriptive macros

2025-04-29 Thread Ahmad Fatoum
Hello Daniel, On 29.04.25 21:46, Daniel Lezcano wrote: > On 29/04/2025 17:04, Sascha Hauer wrote: >> >> On Tue, 29 Apr 2025 15:25:49 +0200, Ahmad Fatoum wrote: >>> This improves readability a bit, but introduces no functional change. >>> >>> >> >> Applied, thanks! > > I'm a bit confused, can you

Re: [PATCH 1/2] clocksource: timer-ti-dm: replace magic constant with descriptive macros

2025-04-29 Thread Daniel Lezcano
On 29/04/2025 17:04, Sascha Hauer wrote: On Tue, 29 Apr 2025 15:25:49 +0200, Ahmad Fatoum wrote: This improves readability a bit, but introduces no functional change. Applied, thanks! I'm a bit confused, can you explain why it is applied ? Is that an official tree ? [1/2] clocksource

[PATCH] AT91: bootsource: Remove zero check of at91_bootsource

2025-04-29 Thread Alexander Shiyan
The patch removes the redundant zero check for at91_bootsource before calling bootsource_set_raw(), as at91_bootsource == 0 is a valid scenario. Signed-off-by: Alexander Shiyan --- arch/arm/mach-at91/sama5_bootsource.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch

Re: [PATCH] zedboard correct comments in lowlevel.c

2025-04-29 Thread Sascha Hauer
On Mon, 28 Apr 2025 19:54:24 +0200, johannes@gnu-linux.rocks wrote: > Signed-off-by: Johannes Roith > > According to the TRM of the Zynq 7000 the registers under 'UART1 pinmux' > represents the pinmux for UART0. So, I fixed the comments and also > added the pin number for the UART0, UART1 and Q

Re: [PATCH 1/2] clocksource: timer-ti-dm: replace magic constant with descriptive macros

2025-04-29 Thread Sascha Hauer
On Tue, 29 Apr 2025 15:25:49 +0200, Ahmad Fatoum wrote: > This improves readability a bit, but introduces no functional change. > > Applied, thanks! [1/2] clocksource: timer-ti-dm: replace magic constant with descriptive macros https://git.pengutronix.de/cgit/barebox/commit/?id=008ef5fe

Re: [PATCH master] linux/iopoll: fix inverted condition in read_poll_timeout

2025-04-29 Thread Sascha Hauer
On Sat, 26 Apr 2025 10:14:15 +0200, Ahmad Fatoum wrote: > If there is no timeout, we wait indefinitely and don't care for the > initial time. A fixup to silence a warning because of multiplication in > boolean context added an explicit comparison and this ended up omitting > get_time_ns() in the

Re: [PATCH master] kbuild: Use -fzero-init-padding-bits=all

2025-04-29 Thread Sascha Hauer
On Fri, 25 Apr 2025 15:38:49 +0200, Ahmad Fatoum wrote: > This is a port of Linux commit dce4aab8441d285b9a78b33753e0bf583c1320ee: > > | Author: Kees Cook > | AuthorDate: Mon Jan 27 11:10:28 2025 -0800 > | > | GCC 15 introduces a regression in "= { 0 }" style initialization of > | u

Re: [PATCH] fixup! commands: devlookup: add support for cdev aliases

2025-04-29 Thread Sascha Hauer
On Fri, 25 Apr 2025 07:48:39 +0200, Ahmad Fatoum wrote: > commands: devlookup: fix memory leak in error case > > There's a string_list_free after out:, which we are skipping when we > directly return. > > Applied, thanks! [1/1] fixup! commands: devlookup: add support for cdev aliases h

Re: [PATCH] lib: random: make srand_xor a no-op in PBL

2025-04-29 Thread Sascha Hauer
On Tue, 29 Apr 2025 09:56:05 +0200, Ahmad Fatoum wrote: > We are going to add srand_xor calls at more places in future, so do not > trigger a BUG() for it on use in PBL. There is still a BUG() call in > random32 and friends, so use of unseeded PRNG won't get unnoticed. > > Applied, thanks! [1

Re: [PATCH] clocksource: omit seeding of RNG in PBL

2025-04-29 Thread Sascha Hauer
On Tue, Apr 29, 2025 at 11:53:07AM +0200, Ahmad Fatoum wrote: > Hello Sascha, > > On 4/25/25 07:39, Sascha Hauer wrote: > > > > On Thu, 24 Apr 2025 10:48:33 +0200, Ahmad Fatoum wrote: > >> We do not maintain a PRNG in the PBL, so we should omit the call to > >> srand_xor in PBL, otherwise it expa

Re: [PATCH] ARM: v7r: fix TLSF memory pool mix-up

2025-04-29 Thread Sascha Hauer
On Tue, 29 Apr 2025 15:50:32 +0200, Ahmad Fatoum wrote: > dma_alloc_coherent allocates memory from a special memory region backing > the dma_coherent_pool. When freeing said memory, this needs to be done > with the same pool as argument, but free uses the normal pool used for > all other allocati

Re: [PATCH 2/9] clocksource: ti-dm: make available in PBL

2025-04-29 Thread Daniel Lezcano
On 29/04/2025 11:31, Ahmad Fatoum wrote: Hello Daniel, On 4/29/25 11:08, Daniel Lezcano wrote: On Tue, Apr 22, 2025 at 07:26:28AM +0200, Ahmad Fatoum wrote: +int omap_dmtimer_init(void __iomem *mmio_start, unsigned clk_speed) +{ + base = mmio_start; + + dmtimer_cs.mult = clocksourc

[PATCH 1/4] ti/k3-navss-ringacc: switch to Linux code base

2025-04-29 Thread Sascha Hauer
The k3-navss-ringacc code was based on U-Boot code. This switches the driver to the corresponding code based on Linux-6.15-rc3. Signed-off-by: Sascha Hauer --- drivers/dma/ti/k3-udma.c | 103 +-- drivers/soc/ti/k3-navss-ringacc.c | 1240 - include/so

[PATCH 4/4] dma: k3-udma: Handle Asel

2025-04-29 Thread Sascha Hauer
This adds support for the Asel aka "Address selection" bits to the k3-udma driver. These bits become important when the DDR firewalls are enabled. With DDR firewalls the buffer addresses used by the PKTDMA engine need to be tagged with the correct Asel value, otherwise they will be blocked by the

[PATCH 2/4] firmware: ti_sci: pass struct to ti_sci_rm_ringacc_ops::config

2025-04-29 Thread Sascha Hauer
struct ti_sci_rm_ringacc_ops::config() already takes 10 parameters and we have to add additional two in followup patches. Pass the data in a struct like the Kernel does. Also rename the op to set_cfg as that's how the Kernel names it. Signed-off-by: Sascha Hauer --- drivers/firmware/ti_sci.c

[PATCH 0/4] K3: Add Asel support to the DMA driver

2025-04-29 Thread Sascha Hauer
5 + drivers/soc/ti/k3-navss-ringacc.c | 1326 - include/soc/ti/k3-navss-ringacc.h | 211 +++--- include/soc/ti/ti_sci_protocol.h | 34 +- 6 files changed, 1088 insertions(+), 642 deletions(-) --- base-commit: fe58b1f7d24ea2171d0761a26f2b5a74e61322e4 change-

[PATCH 3/4] firmware: ti_sci: handle Asel

2025-04-29 Thread Sascha Hauer
This adds support for the Asel aka "Address selection" bits to ti_sci. These bits become important when the DDR firewalls are enabled. With DDR firewalls the buffer addresses used by the PKTDMA engine need to be tagged with the correct Asel value, otherwise they will be blocked by the firewall. S

[PATCH] net: am65-cpsw-nuss: fix common enable counter

2025-04-29 Thread Sascha Hauer
The cpsw common is ought to be reference counted, but the reference counter is only ever increased to one. Increase the reference for additional am65_cpsw_common_start() calls. This fixes a warning when barebox is shut down: ERROR: 800.ether...@800.of: dma failed with -22 Signed-off-by:

[PATCH] ARM: v7r: fix TLSF memory pool mix-up

2025-04-29 Thread Ahmad Fatoum
dma_alloc_coherent allocates memory from a special memory region backing the dma_coherent_pool. When freeing said memory, this needs to be done with the same pool as argument, but free uses the normal pool used for all other allocations instead. Failure to do so will trigger memory corruption durin

[PATCH 2/2] clocksource: timer-ti-dm: adapt omap_dmtimer_init parameter type to usage

2025-04-29 Thread Ahmad Fatoum
The clk_speed argument is used as input to clocksource_hz2mult() which has a u32 as parameter. While u32 and unsigned are equivalent in barebox, it's still a good idea to differentiate between "normal"-sized integers and integers that are explicitly meant to be exactly 32-bit. No functional change

[PATCH 1/2] clocksource: timer-ti-dm: replace magic constant with descriptive macros

2025-04-29 Thread Ahmad Fatoum
This improves readability a bit, but introduces no functional change. Suggested-by: Daniel Lezcano Signed-off-by: Ahmad Fatoum --- drivers/clocksource/timer-ti-dm.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/ti

Re: [PATCH] clocksource: omit seeding of RNG in PBL

2025-04-29 Thread Ahmad Fatoum
Hello Sascha, On 4/25/25 07:39, Sascha Hauer wrote: > > On Thu, 24 Apr 2025 10:48:33 +0200, Ahmad Fatoum wrote: >> We do not maintain a PRNG in the PBL, so we should omit the call to >> srand_xor in PBL, otherwise it expands to BUG() and breaks the newly >> introduced PBL clocksource support. >>

Re: Porting Cora Z7 Board to barebox

2025-04-29 Thread Ahmad Fatoum
Hi, On 4/29/25 10:34, Sascha Hauer wrote: > In case of the Zedboard you could take start_avnet_zedboard.pbl. This > contains all necessary components including device tree and barebox > proper. > > However, this binary is linked to 0x0 and the FSBL will likely load it > there. I don't know where

Re: [PATCH 2/9] clocksource: ti-dm: make available in PBL

2025-04-29 Thread Ahmad Fatoum
Hello Daniel, On 4/29/25 11:08, Daniel Lezcano wrote: > On Tue, Apr 22, 2025 at 07:26:28AM +0200, Ahmad Fatoum wrote: >> +int omap_dmtimer_init(void __iomem *mmio_start, unsigned clk_speed) >> +{ >> +base = mmio_start; >> + >> +dmtimer_cs.mult = clocksource_hz2mult(clk_speed, dmtimer_cs.sh

Re: [PATCH 2/9] clocksource: ti-dm: make available in PBL

2025-04-29 Thread Daniel Lezcano
On Tue, Apr 22, 2025 at 07:26:28AM +0200, Ahmad Fatoum wrote: > Now that there's clocksource framework support in PBL, let's make > available the first clocksource driver for use by OMAP HSMMC. > > Signed-off-by: Ahmad Fatoum > --- > arch/arm/mach-omap/Kconfig| 1 + > drivers/clocksourc

[PATCH] net: phy: seed PRNG from PHY link up jitter

2025-04-29 Thread Ahmad Fatoum
The new Xorshift* RNG is seeded only from the cycle counter at startup, which is much less entropy for the MAC address generation use case, which used the nanosecond timestamp at generation time before the switch to Xorshift*. The nice thing about our new PRNG implementation is that we can call sr

Re: Porting Cora Z7 Board to barebox

2025-04-29 Thread Sascha Hauer
Hi Johannes, On Mon, Apr 28, 2025 at 07:20:01PM +0200, johannes@gnu-linux.rocks wrote: > I have a Cora Z7 board which I want to port to barebox. The Cora Z7 embeds an > Zynq 7000 SoC with a single core Cortex-A9 and 512 MB DDR3 memory. Barebox > already supports the Zynq 7000 and the Avnet Zedboar

[PATCH] lib: random: make srand_xor a no-op in PBL

2025-04-29 Thread Ahmad Fatoum
We are going to add srand_xor calls at more places in future, so do not trigger a BUG() for it on use in PBL. There is still a BUG() call in random32 and friends, so use of unseeded PRNG won't get unnoticed. Signed-off-by: Ahmad Fatoum --- This replaces https://lore.barebox.org/barebox/1745559562