typo in subject: zynmp-fpga -> zynqmp-fpga
On 09.12.19 14:59, Michael Tretter wrote:
> Avoid the example bitstream header to validate the bitstream that should
> be loaded into the FPGA. The header is mostly 0x with a few
> special values at a certain offsets and can be better described
From: Michael Tretter
The bitstream header has 5 fields, that start with a char for the type.
Four fields have a big-ending length and a null-terminated string for
the design name, the part number, and the date and time of creation. The
last field is a big-endian 32 bit unsigned int for the size
From: Thomas Haemmerle
The driver provides functionalities to check and load a bitstream to FPGA.
A boolean parameter to check if FPGA is already programmed is
added.
Signed-off-by: Thomas Haemmerle
---
arch/arm/configs/zynqmp_defconfig | 1 +
drivers/firmware/Kconfig | 7 +
From: Thomas Haemmerle
Changes from v1:
- remove dts commits
- add commit for pmu and trustzone firmware virsion macro
- split bin-header validation and byte-order detection
- add description for bitstream
Michael Tretter (1):
firmware: zynqmp-fpga: print Xilinx bitstream header
Thomas
From: Thomas Haemmerle
Port functions from xlnx-linux to get FPGA status and invoke bitstream
loading.
Signed-off-by: Thomas Haemmerle
---
arch/arm/mach-zynqmp/firmware-zynqmp.c | 48 +-
.../arm/mach-zynqmp/include/mach/firmware-zynqmp.h | 14 ++-
2 files
From: Thomas Haemmerle
Signed-off-by: Thomas Haemmerle
---
arch/arm/mach-zynqmp/firmware-zynqmp.c | 22 ++
1 file changed, 10 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-zynqmp/firmware-zynqmp.c
b/arch/arm/mach-zynqmp/firmware-zynqmp.c
index f2187e9..d91dcb0
From: Michael Tretter
The bitstream header has 5 fields, that start with a char for the type.
Four fields have a big-ending length and a null-terminated string for
the design name, the part number, and the date and time of creation. The
last field is a big-endian 32 bit unsigned int for the size
From: Michael Tretter
The firmware node will be added to the mainline device tree. As it will
eventually enter Barebox via a device tree sync, add it to the src tree
already.
Signed-off-by: Michael Tretter
---
arch/arm/dts/zynqmp-zcu104-revA.dts | 1 -
arch/arm/dts/zynqmp.dtsi|
From: Thomas Haemmerle
Port functions from xlnx-linux to get FPGA status and invoke bitstream
loading.
Signed-off-by: Thomas Haemmerle
---
arch/arm/mach-zynqmp/firmware-zynqmp.c | 47 ++
.../arm/mach-zynqmp/include/mach/firmware-zynqmp.h | 8
2 files
From: Thomas Haemmerle
The pcap node will be added to the mainline device tree. As it will
eventually enter Barebox via a device tree sync, add it to the src tree
already.
Signed-off-by: Thomas Haemmerle
---
dts/src/arm64/xilinx/zynqmp.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git
From: Thomas Haemmerle
The driver provides functionalities to check and load a bitstream to FPGA.
A boolean parameter to check if FPGA is already programmed is
added.
Signed-off-by: Thomas Haemmerle
---
arch/arm/configs/zynqmp_defconfig | 1 +
From: Thomas Haemmerle
Michael Tretter (2):
ARM: zynqmp: dts: move firmware node to src tree
firmware: zynqmp-fpga: print Xilinx bitstream header
Thomas Haemmerle (3):
firmware-zynqmp: extend driver with fpga relavant functions
firmware: zynqmp-fpga: introduce driver to load bitstream
From: Thomas Haemmerle
Changes since v1:
- return -EIO (instead of -1) if API version or trustzone version are
earlier than v1.0 in probe function
Thomas Haemmerle (1):
firmware-zynqmp: port from linux
arch/arm/Kconfig | 1 +
Hi Sascha,
On 12.02.19 09:31, Sascha Hauer wrote:
> Hi Thomas,
>
> On Mon, Feb 11, 2019 at 02:10:40PM +0000, Thomas Hämmerle wrote:
>> From: Thomas Haemmerle
>>
>> Port Xilinx Zynq MPSoC Firmware layer driver from linux.
>>
>> Signed-off-by: Thomas
6 0x0294
#define GEM_DCFG7 0x0298
+#define GEM_TQ10x0440
+#define GEM_RQ10x0480
/* Bitfields in NCR */
#define MACB_LB_OFFSET 0
--
2.7.4
Thomas Häm
.phy_id = DP83867_PHY_ID,
+ .phy_id_mask = 0xfff0,
+ .drv.name = "TI DP83867",
+ .features = PHY_GBIT_FEATURES,
+
+ .config_init = dp83867_config_init,
+
+ .c
mel,sama5d3-gem",},
+ { .compatible = "cdns,zynqmp-gem",},
{ /* sentinel */ }
};
--
2.7.4
Thomas Hämmerle
Research and Development
Wolfvision GmbH
| 6833 Klaus | Austria
Tel: +43 5523 52250 | Mail: thomas.haemme...@wolfvision.net
Webpage: www.wolfvision.com | www.w
>dev, "[%d] rx_buffer_size [%d]\n",
+ dev_dbg(bp->dev, "[%zu] rx_buffer_size [%d]\n",
size, bp->rx_buffer_size);
}
--
2.7.4
Thomas Hämmerle
Research and Development
Wolfvision GmbH
| 6833 Klaus | Austria
Tel: +43 5523 52250 | Mail: th
urn MACB_BFEXT(IDNUM, macb_readl(macb, MID)) >= 0x2;
}
static int macb_send(struct eth_device *edev, void *packet,
--
2.7.4
Thomas Hämmerle
Research and Development
Wolfvision GmbH
| 6833 Klaus | Austria
Tel: +43 5523 52250 | Mail: thomas.haemme...@wolfvision.net
Webpage: www.wolfvisi
LTIPLE);
}
- bp->rx_buffer = dma_alloc_coherent(bp->rx_buffer_size *
bp->rx_ring_size,
- DMA_ADDRESS_BROKEN);
}
dev_dbg(bp->dev, "[%zu] rx_buffer_size [%d]\n",
--
2.7.
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