Re: [PATCH] ARM: cache-armv7: remove superfluous instruction

2019-10-14 Thread Sascha Hauer
On Tue, Oct 08, 2019 at 04:46:28PM +0200, Ahmad Fatoum wrote: > There are two tst r11, #0xf with nothing in between them that changes > r11. This a left over from the kernel code that checks for VMSA twice, > once to check if the page table should be setup and once to more to > flush the TLB. We

[PATCH] ARM: cache-armv7: remove superfluous instruction

2019-10-08 Thread Ahmad Fatoum
There are two tst r11, #0xf with nothing in between them that changes r11. This a left over from the kernel code that checks for VMSA twice, once to check if the page table should be setup and once to more to flush the TLB. We do the setup in the caller already, so the tst serves no useful