Hi Sascha,
2015-01-21 22:56 GMT+09:00 Sascha Hauer :
> On Wed, Jan 21, 2015 at 01:24:14PM +0900, Masahiro Yamada wrote:
>> This code is unnecessary (wrong) for the following reasons.
>>
>> [1] As ARM ARM clearly says, the entire Level 1 cache maintenance
>> operations are not supported for AR
On Wed, Jan 21, 2015 at 01:24:14PM +0900, Masahiro Yamada wrote:
> This code is unnecessary (wrong) for the following reasons.
>
> [1] As ARM ARM clearly says, the entire Level 1 cache maintenance
> operations are not supported for ARMv7, i.e. the bit19-16 of
> the ID_MMFR1 is always 0b000
This code is unnecessary (wrong) for the following reasons.
[1] As ARM ARM clearly says, the entire Level 1 cache maintenance
operations are not supported for ARMv7, i.e. the bit19-16 of
the ID_MMFR1 is always 0b. The code always jumps to the
"hierarchical" label.
[2] The value o
