Re: [PATCH 1/2] sama5d3x: fix HSMC MODE register offset and add TIMINGS register

2014-07-31 Thread Matteo Fortini
Yes confirmed Sascha, bag of paper for me for not checking it all. I renamed AT91_SMC_MODE->AT91_SAM9_SMC_MODE because I introduced AT91_SAMA5_SMC_MODE and AT91_SMC_MODE was ambiguous. Thank you and my apologies, Matteo Il 31/07/2014 14:39, Sascha Hauer ha scritto: Hi Matteo, On Mon, Jul 21

Re: [PATCH 1/2] sama5d3x: fix HSMC MODE register offset and add TIMINGS register

2014-07-31 Thread Sascha Hauer
Hi Matteo, On Mon, Jul 21, 2014 at 06:13:26PM +0200, Matteo Fortini wrote: > As stated in section 29.19.35 of SAMA5D3 Series Datasheet, > MODE register has offset 0x10 and at offset 0x0C there is > a TIMINGS register. > > Signed-off-by: Matteo Fortini I had to fix up this patch with: >From 43a

[PATCH 1/2] sama5d3x: fix HSMC MODE register offset and add TIMINGS register

2014-07-21 Thread Matteo Fortini
As stated in section 29.19.35 of SAMA5D3 Series Datasheet, MODE register has offset 0x10 and at offset 0x0C there is a TIMINGS register. Signed-off-by: Matteo Fortini --- arch/arm/mach-at91/include/mach/at91sam9_smc.h | 34 ++- arch/arm/mach-at91/sam9_smc.c |

Re: [PATCH 1/2] sama5d3x: fix HSMC MODE register offset and add TIMINGS register

2014-07-07 Thread Sascha Hauer
On Mon, Jul 07, 2014 at 08:17:44PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote: > On 08:20 Mon 07 Jul , Sascha Hauer wrote: > > > > On Fri, Jul 04, 2014 at 03:47:58PM +0800, Jean-Christophe PLAGNIOL-VILLARD > > wrote: > > > > > > On Jun 24, 2014, at 7:26 PM, Matteo Fortini > > > wrote:

Re: [PATCH 1/2] sama5d3x: fix HSMC MODE register offset and add TIMINGS register

2014-07-07 Thread Jean-Christophe PLAGNIOL-VILLARD
On 08:20 Mon 07 Jul , Sascha Hauer wrote: > > On Fri, Jul 04, 2014 at 03:47:58PM +0800, Jean-Christophe PLAGNIOL-VILLARD > wrote: > > > > On Jun 24, 2014, at 7:26 PM, Matteo Fortini > > wrote: > > > > > > > > +void sam9_smc_sama5d3_configure(int id, int cs, struct sam9_smc_config > > >

Re: [PATCH 1/2] sama5d3x: fix HSMC MODE register offset and add TIMINGS register

2014-07-06 Thread Sascha Hauer
On Fri, Jul 04, 2014 at 03:47:58PM +0800, Jean-Christophe PLAGNIOL-VILLARD wrote: > > On Jun 24, 2014, at 7:26 PM, Matteo Fortini wrote: > > > > > +void sam9_smc_sama5d3_configure(int id, int cs, struct sam9_smc_config > > *config, struct sam9_smc_sama5d3_extra_config *sama5d3_extra_config) >

Re: [PATCH 1/2] sama5d3x: fix HSMC MODE register offset and add TIMINGS register

2014-07-04 Thread Matteo Fortini
Ok guys, who calls the shots? My V1 of the patch had the big structure and ignored the timings part, and Sascha said he preferred not to incur in the overhead of managing the extra part. In V2 I split the structures and had some minor naming issues and I am currently preparing a V3 with the split s

Re: [PATCH 1/2] sama5d3x: fix HSMC MODE register offset and add TIMINGS register

2014-07-04 Thread Jean-Christophe PLAGNIOL-VILLARD
On Jun 24, 2014, at 7:26 PM, Matteo Fortini wrote: > > As stated in section 29.19.35 of SAMA5D3 Series Datasheet, > MODE register has offset 0x10 and at offset 0x0C there is > a TIMINGS register. > > Signed-off-by: Matteo Fortini > --- > arch/arm/mach-at91/include/mach/at91sam9_smc.h | 35 +++

Re: [PATCH 1/2] sama5d3x: fix HSMC MODE register offset and add TIMINGS register

2014-07-04 Thread Jean-Christophe PLAGNIOL-VILLARD
On Jun 24, 2014, at 7:26 PM, Matteo Fortini wrote: > > As stated in section 29.19.35 of SAMA5D3 Series Datasheet, > MODE register has offset 0x10 and at offset 0x0C there is > a TIMINGS register. > > Signed-off-by: Matteo Fortini > --- > arch/arm/mach-at91/include/mach/at91sam9_smc.h | 35 +++

Re: [PATCH 1/2] sama5d3x: fix HSMC MODE register offset and add TIMINGS register

2014-07-02 Thread Raphaël Poggi
Hi all ! So what's the status of these patch? Matteo, are you working on a v2 patch series ? Raphaël 2014-06-25 8:42 GMT+02:00 Sascha Hauer : > On Wed, Jun 25, 2014 at 09:45:49AM +0800, Bo Shen wrote: >> Hi Matteo, >> Thanks for your patch. >> >> Hi Jean-Christophe PLAGNIOL-VILLARD, >> For t

Re: [PATCH 1/2] sama5d3x: fix HSMC MODE register offset and add TIMINGS register

2014-06-24 Thread Sascha Hauer
On Wed, Jun 25, 2014 at 09:45:49AM +0800, Bo Shen wrote: > Hi Matteo, > Thanks for your patch. > > Hi Jean-Christophe PLAGNIOL-VILLARD, > For this patch series, can you give some comments (maybe the > question from I need more discussion)? Thanks. > > On 06/24/2014 07:26 PM, Matteo Fortini wr

Re: [PATCH 1/2] sama5d3x: fix HSMC MODE register offset and add TIMINGS register

2014-06-24 Thread Bo Shen
Hi Matteo, Thanks for your patch. Hi Jean-Christophe PLAGNIOL-VILLARD, For this patch series, can you give some comments (maybe the question from I need more discussion)? Thanks. On 06/24/2014 07:26 PM, Matteo Fortini wrote: As stated in section 29.19.35 of SAMA5D3 Series Datasheet, MODE

[PATCH 1/2] sama5d3x: fix HSMC MODE register offset and add TIMINGS register

2014-06-24 Thread Matteo Fortini
As stated in section 29.19.35 of SAMA5D3 Series Datasheet, MODE register has offset 0x10 and at offset 0x0C there is a TIMINGS register. Signed-off-by: Matteo Fortini --- arch/arm/mach-at91/include/mach/at91sam9_smc.h | 35 +- arch/arm/mach-at91/sam9_smc.c

Re: [PATCH 1/2] sama5d3x: fix HSMC MODE register offset and add TIMINGS register

2014-06-09 Thread Sascha Hauer
On Fri, Jun 06, 2014 at 11:12:15AM +0200, Matteo Fortini wrote: > As stated in section 29.19.35 of SAMA5D3 Series Datasheet, > MODE register has offset 0x10 and at offset 0x0C there is > a TIMINGS register. > > Signed-off-by: Matteo Fortini > --- > arch/arm/mach-at91/include/mach/at91sam9_smc.h

[PATCH 1/2] sama5d3x: fix HSMC MODE register offset and add TIMINGS register

2014-06-06 Thread Matteo Fortini
As stated in section 29.19.35 of SAMA5D3 Series Datasheet, MODE register has offset 0x10 and at offset 0x0C there is a TIMINGS register. Signed-off-by: Matteo Fortini --- arch/arm/mach-at91/include/mach/at91sam9_smc.h | 31 +- arch/arm/mach-at91/sam9_smc.c