To support different module variants, split the phyCORE dts
in dts and dtsi. Configurable parts which are supported by
barebox are spi nor flash and i2c eeprom.
Signed-off-by: Teresa Gámez <t.ga...@phytec.de>
---
arch/arm/boards/phytec-phycore-am335x/board.c | 4 +-
arch/arm/boards/phytec-phycore-am335x/lowlevel.c | 6 +-
arch/arm/dts/Makefile | 2 +-
arch/arm/dts/am335x-phytec-phycore-som.dts | 24 ++
arch/arm/dts/am335x-phytec-phycore-som.dtsi | 286 ++++++++++++++++++++++
arch/arm/dts/am335x-phytec-phycore.dts | 292 -----------------------
6 files changed, 316 insertions(+), 298 deletions(-)
create mode 100644 arch/arm/dts/am335x-phytec-phycore-som.dts
create mode 100644 arch/arm/dts/am335x-phytec-phycore-som.dtsi
delete mode 100644 arch/arm/dts/am335x-phytec-phycore.dts
diff --git a/arch/arm/boards/phytec-phycore-am335x/board.c
b/arch/arm/boards/phytec-phycore-am335x/board.c
index 035866b..64e3904 100644
--- a/arch/arm/boards/phytec-phycore-am335x/board.c
+++ b/arch/arm/boards/phytec-phycore-am335x/board.c
@@ -34,7 +34,7 @@
static int pcm051_coredevice_init(void)
{
- if (!of_machine_is_compatible("phytec,pcm051"))
+ if (!of_machine_is_compatible("phytec,phycore-am335x-som"))
return 0;
am33xx_register_ethaddr(0, 0);
@@ -58,7 +58,7 @@ static char *xloadslots[] = {
static int pcm051_devices_init(void)
{
- if (!of_machine_is_compatible("phytec,pcm051"))
+ if (!of_machine_is_compatible("phytec,phycore-am335x-som"))
return 0;
switch (bootsource_get()) {
diff --git a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c
b/arch/arm/boards/phytec-phycore-am335x/lowlevel.c
index 66bae80..47902d0 100644
--- a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c
+++ b/arch/arm/boards/phytec-phycore-am335x/lowlevel.c
@@ -117,7 +117,7 @@ struct pcm051_sdram_timings timings[] = {
},
};
-extern char __dtb_am335x_phytec_phycore_start[];
+extern char __dtb_am335x_phytec_phycore_som_start[];
/**
* @brief The basic entry point for board initialization.
@@ -153,7 +153,7 @@ static noinline void pcm051_board_init(int sdram)
omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE);
putc_ll('>');
- fdt = __dtb_am335x_phytec_phycore_start - get_runtime_offset();
+ fdt = __dtb_am335x_phytec_phycore_som_start - get_runtime_offset();
am335x_barebox_entry(fdt);
}
@@ -198,7 +198,7 @@ ENTRY_FUNCTION(start_am33xx_phytec_phycore_sdram, r0, r1,
r2)
{
void *fdt;
- fdt = __dtb_am335x_phytec_phycore_start - get_runtime_offset();
+ fdt = __dtb_am335x_phytec_phycore_som_start - get_runtime_offset();
am335x_barebox_entry(fdt);
}
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 3fcd5f1..65ed022 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -26,7 +26,7 @@ pbl-dtb-$(CONFIG_MACH_NVIDIA_JETSON) +=
tegra124-jetson-tk1.dtb.o
pbl-dtb-$(CONFIG_MACH_PCA100) += imx27-phytec-phycard-s-rdk-bb.dtb.o
pbl-dtb-$(CONFIG_MACH_PCAAXL3) += imx6q-phytec-pbaa03.dtb.o
pbl-dtb-$(CONFIG_MACH_PCM038) += imx27-phytec-phycore-rdk.dtb.o
-pbl-dtb-$(CONFIG_MACH_PCM051) += am335x-phytec-phycore.dtb.o
+pbl-dtb-$(CONFIG_MACH_PCM051) += am335x-phytec-phycore-som.dtb.o
pbl-dtb-$(CONFIG_MACH_PHYTEC_PFLA02) += imx6s-phytec-pbab01.dtb.o
imx6dl-phytec-pbab01.dtb.o imx6q-phytec-pbab01.dtb.o
pbl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3) +=
armada-xp-openblocks-ax3-4-bb.dtb.o
pbl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_A6) +=
kirkwood-openblocks_a6-bb.dtb.o
diff --git a/arch/arm/dts/am335x-phytec-phycore-som.dts
b/arch/arm/dts/am335x-phytec-phycore-som.dts
new file mode 100644
index 0000000..93f09e2
--- /dev/null
+++ b/arch/arm/dts/am335x-phytec-phycore-som.dts
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2014 Teresa Gámez <t.ga...@phytec.de> Phytec Messtechnik GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-phytec-phycore-som.dtsi"
+
+/ {
+ model = "Phytec phyCORE AM335x";
+ compatible = "phytec,phycore-am335x-som", "ti,am33xx";
+};
+
+&spi0 {
+ status = "okay";
+};
+
+&eeprom {
+ status = "okay";
+};
diff --git a/arch/arm/dts/am335x-phytec-phycore-som.dtsi
b/arch/arm/dts/am335x-phytec-phycore-som.dtsi
new file mode 100644
index 0000000..f1bcb8b
--- /dev/null
+++ b/arch/arm/dts/am335x-phytec-phycore-som.dtsi
@@ -0,0 +1,286 @@
+/ {
+ chosen {
+ linux,stdout-path = &uart0;
+
+ environment-spi {
+ compatible = "barebox,environment";
+ device-path = &flash, "partname:bareboxenv";
+ status = "disabled";
+ };
+
+ environment-nand {
+ compatible = "barebox,environment";
+ device-path = &nand, "partname:bareboxenv";
+ status = "disabled";
+ };
+ };
+};
+
+&am33xx_pinmux {
+ i2c0_pins: pinmux_i2c0_pins {
+ pinctrl-single,pins = <
+ 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /*
i2c0_sda.i2c0_sda */
+ 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /*
i2c0_scl.i2c0_scl */
+ >;
+ };
+
+ spi0_pins: pinmux_spi0_pins {
+ pinctrl-single,pins = <
+ 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE0) /*
spi0_clk.spi0_clk */
+ 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0) /*
spi0_d0.spi0_d0 */
+ 0x158 (PIN_INPUT_PULLUP | MUX_MODE0) /*
spi0_d1.spi0_d1 */
+ 0x15c (PIN_INPUT_PULLUP | MUX_MODE0) /*
spi0_cs0.spi0_cs0 */
+ >;
+ };
+
+ uart0_pins: pinmux_uart0_pins {
+ pinctrl-single,pins = <
+ 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /*
uart0_rxd.uart0_rxd */
+ 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /*
uart0_txd.uart0_txd */
+ >;
+ };
+
+ mmc1_pins: pinmux_mmc1_pins {
+ pinctrl-single,pins = <
+ 0xf0 (MUX_MODE0 | INPUT_EN | PULL_UP) /*
mmc0_dat3.mmc0_dat3 */
+ 0xf4 (MUX_MODE0 | INPUT_EN | PULL_UP) /*
mmc0_dat2.mmc0_dat2 */
+ 0xf8 (MUX_MODE0 | INPUT_EN | PULL_UP) /*
mmc0_dat1.mmc0_dat1 */
+ 0xfc (MUX_MODE0 | INPUT_EN | PULL_UP) /*
mmc0_dat0.mmc0_dat0 */
+ 0x100 (MUX_MODE0 | INPUT_EN | PULL_UP) /*
mmc0_clk.mmc0_clk */
+ 0x104 (MUX_MODE0 | INPUT_EN | PULL_UP) /*
mmc0_cmd.mmc0_cmd */
+ >;
+ };
+
+ emac_rmii1_pins: pinmux_emac_rmii1_pins {
+ pinctrl-single,pins = <
+ 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
mii1_crs.rmii1_crs_dv */
+ 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
mii1_rxerr.rmii1_rxerr */
+ 0x114 (PIN_OUTPUT | MUX_MODE1) /*
mii1_txen.rmii1_txen */
+ 0x124 (PIN_OUTPUT | MUX_MODE1) /*
mii1_txd1.rmii1_txd1 */
+ 0x128 (PIN_OUTPUT | MUX_MODE1) /*
mii1_txd0.rmii1_txd0 */
+ 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
mii1_rxd1.rmii1_rxd1 */
+ 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
mii1_rxd0.rmii1_rxd0 */
+ 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /*
rmii1_refclk.rmii1_refclk */
+ >;
+ };
+
+ nandflash_pins_s0: nandflash_pins_s0 {
+ pinctrl-single,pins = <
+ 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad0.gpmc_ad0 */
+ 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad1.gpmc_ad1 */
+ 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad2.gpmc_ad2 */
+ 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad3.gpmc_ad3 */
+ 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad4.gpmc_ad4 */
+ 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad5.gpmc_ad5 */
+ 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad6.gpmc_ad6 */
+ 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad7.gpmc_ad7 */
+ 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_wait0.gpmc_wait0 */
+ 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /*
gpmc_wpn.gpio0_30 */
+ 0x7c (PIN_OUTPUT | MUX_MODE0) /*
gpmc_csn0.gpmc_csn0 */
+ 0x90 (PIN_OUTPUT | MUX_MODE0) /*
gpmc_advn_ale.gpmc_advn_ale */
+ 0x94 (PIN_OUTPUT | MUX_MODE0) /*
gpmc_oen_ren.gpmc_oen_ren */
+ 0x98 (PIN_OUTPUT | MUX_MODE0) /*
gpmc_wen.gpmc_wen */
+ 0x9c (PIN_OUTPUT | MUX_MODE0) /*
gpmc_be0n_cle.gpmc_be0n_cle */
+ >;
+ };
+
+ davinci_mdio_default: davinci_mdio_default {
+ pinctrl-single,pins = <
+ /* MDIO */
+ 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)
/* mdio_data.mdio_data */
+ 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)
/* mdio_clk.mdio_clk */
+ >;
+ };
+
+ pcm051_led_pins: pinmux_pcm051_led_pins {
+ pinctrl-single,pins = <
+ 0x80 (MUX_MODE7)
+ 0x84 (MUX_MODE7)
+ >;
+ };
+
+ pcm051_user_pins: pinmux_pcm051_user_pins {
+ pinctrl-single,pins = <
+ 0x1e4 (PULL_UP |INPUT_EN |MUX_MODE7)
+ 0x1e8 (PULL_UP |INPUT_EN |MUX_MODE7)
+ >;
+ };
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+
+ status = "okay";
+ clock-frequency = <400000>;
+
+ eeprom: 24c32@52 {
+ status = "disabled";
+ compatible = "atmel,24c32";
+ pagesize = <32>;
+ reg = <0x52>;
+ };
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ status = "okay";
+};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ status = "disabled";
+
+ flash: m25p80 {
+ compatible = "m25p80";
+ spi-max-frequency = <48000000>;
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "xload";
+ reg = <0x0 0x20000>;
+ };
+
+ partition@1 {
+ label = "barebox";
+ reg = <0x20000 0x80000>;
+ };
+
+ partition@2 {
+ label = "bareboxenv";
+ reg = <0xa0000 0x20000>;
+ };
+
+ partition@3 {
+ label = "oftree";
+ reg = <0xc0000 0x20000>;
+ };
+
+ partition@4 {
+ label = "kernel";
+ reg = <0xe0000 0x400000>;
+ };
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+ status = "okay";
+};
+
+&davinci_mdio {
+ pinctrl-names = "default";
+ pinctrl-0 = <&davinci_mdio_default>;
+ status = "okay";
+};
+
+&phy_sel {
+ rmii-clock-ext;
+};
+
+&cpsw_emac0 {
+ phy_id = <&davinci_mdio>, <0>;
+ phy-mode = "rmii";
+};
+
+&mac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rmii1_pins>;
+ slaves = <1>;
+ status = "okay";
+};
+
+&gpmc {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&nandflash_pins_s0>;
+ ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
+ nand: nand@0,0 {
+ reg = <0 0 0>; /* CS0, offset 0 */
+ nand-bus-width = <8>;
+ ti,nand-ecc-opt = "bch8";
+ gpmc,device-nand = "true";
+ gpmc,device-width = <1>;
+ gpmc,sync-clk-ps = <0>;
+ gpmc,cs-on-ns = <0>;
+ gpmc,cs-rd-off-ns = <30>;
+ gpmc,cs-wr-off-ns = <30>;
+ gpmc,adv-on-ns = <0>;
+ gpmc,adv-rd-off-ns = <30>;
+ gpmc,adv-wr-off-ns = <30>;
+ gpmc,we-on-ns = <0>;
+ gpmc,we-off-ns = <20>;
+ gpmc,oe-on-ns = <10>;
+ gpmc,oe-off-ns = <30>;
+ gpmc,access-ns = <30>;
+ gpmc,rd-cycle-ns = <30>;
+ gpmc,wr-cycle-ns = <30>;
+ gpmc,wait-pin = <1>;
+ gpmc,wait-on-read = "true";
+ gpmc,wait-on-write = "true";
+ gpmc,bus-turnaround-ns = <0>;
+ gpmc,cycle2cycle-delay-ns = <50>;
+ gpmc,clk-activation-ns = <0>;
+ gpmc,wait-monitoring-ns = <0>;
+ gpmc,wr-access-ns = <0>;
+ gpmc,wr-data-mux-bus-ns = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ elm_id = <&elm>;
+
+ partition@0 {
+ label = "xload";
+ reg = <0x0 0x20000>;
+ };
+
+ partition@1 {
+ label = "xload_backup1";
+ reg = <0x20000 0x20000>;
+ };
+
+ partition@2 {
+ label = "xload_backup2";
+ reg = <0x40000 0x20000>;
+ };
+
+ partition@3 {
+ label = "xload_backup3";
+ reg = <0x60000 0x20000>;
+ };
+
+ partition@4 {
+ label = "barebox";
+ reg = <0x80000 0x80000>;
+ };
+
+ partition@5 {
+ label = "bareboxenv";
+ reg = <0x100000 0x20000>;
+ };
+
+ partition@6 {
+ label = "oftree";
+ reg = <0x120000 0x20000>;
+ };
+
+ partition@7 {
+ label = "kernel";
+ reg = <0x140000 0x800000>;
+ };
+
+ partition@8 {
+ label = "root";
+ /*
+ * Size 0x0 extends partition to
+ * end of nand flash.
+ */
+ reg = <0x940000 0x0>;
+ };
+ };
+};
diff --git a/arch/arm/dts/am335x-phytec-phycore.dts
b/arch/arm/dts/am335x-phytec-phycore.dts
deleted file mode 100644
index 1a1352f..0000000
--- a/arch/arm/dts/am335x-phytec-phycore.dts
+++ /dev/null
@@ -1,292 +0,0 @@
-/dts-v1/;
-
-#include "am33xx.dtsi"
-
-/ {
- model = "Phytec phyCORE AM335x";
- compatible = "phytec,phycore-am335x", "phytec,pcm051", "ti,am33xx";
-
- chosen {
- linux,stdout-path = &uart0;
-
- environment-spi {
- compatible = "barebox,environment";
- device-path = &flash, "partname:bareboxenv";
- status = "disabled";
- };
-
- environment-nand {
- compatible = "barebox,environment";
- device-path = &nand, "partname:bareboxenv";
- status = "disabled";
- };
- };
-};
-
-&am33xx_pinmux {
- i2c0_pins: pinmux_i2c0_pins {
- pinctrl-single,pins = <
- 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /*
i2c0_sda.i2c0_sda */
- 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /*
i2c0_scl.i2c0_scl */
- >;
- };
-
- spi0_pins: pinmux_spi0_pins {
- pinctrl-single,pins = <
- 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE0) /*
spi0_clk.spi0_clk */
- 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0) /*
spi0_d0.spi0_d0 */
- 0x158 (PIN_INPUT_PULLUP | MUX_MODE0) /*
spi0_d1.spi0_d1 */
- 0x15c (PIN_INPUT_PULLUP | MUX_MODE0) /*
spi0_cs0.spi0_cs0 */
- >;
- };
-
- uart0_pins: pinmux_uart0_pins {
- pinctrl-single,pins = <
- 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /*
uart0_rxd.uart0_rxd */
- 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /*
uart0_txd.uart0_txd */
- >;
- };
-
- mmc1_pins: pinmux_mmc1_pins {
- pinctrl-single,pins = <
- 0xf0 (MUX_MODE0 | INPUT_EN | PULL_UP) /*
mmc0_dat3.mmc0_dat3 */
- 0xf4 (MUX_MODE0 | INPUT_EN | PULL_UP) /*
mmc0_dat2.mmc0_dat2 */
- 0xf8 (MUX_MODE0 | INPUT_EN | PULL_UP) /*
mmc0_dat1.mmc0_dat1 */
- 0xfc (MUX_MODE0 | INPUT_EN | PULL_UP) /*
mmc0_dat0.mmc0_dat0 */
- 0x100 (MUX_MODE0 | INPUT_EN | PULL_UP) /*
mmc0_clk.mmc0_clk */
- 0x104 (MUX_MODE0 | INPUT_EN | PULL_UP) /*
mmc0_cmd.mmc0_cmd */
- >;
- };
-
- emac_rmii1_pins: pinmux_emac_rmii1_pins {
- pinctrl-single,pins = <
- 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
mii1_crs.rmii1_crs_dv */
- 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
mii1_rxerr.rmii1_rxerr */
- 0x114 (PIN_OUTPUT | MUX_MODE1) /*
mii1_txen.rmii1_txen */
- 0x124 (PIN_OUTPUT | MUX_MODE1) /*
mii1_txd1.rmii1_txd1 */
- 0x128 (PIN_OUTPUT | MUX_MODE1) /*
mii1_txd0.rmii1_txd0 */
- 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
mii1_rxd1.rmii1_rxd1 */
- 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /*
mii1_rxd0.rmii1_rxd0 */
- 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /*
rmii1_refclk.rmii1_refclk */
- >;
- };
-
- nandflash_pins_s0: nandflash_pins_s0 {
- pinctrl-single,pins = <
- 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad0.gpmc_ad0 */
- 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad1.gpmc_ad1 */
- 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad2.gpmc_ad2 */
- 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad3.gpmc_ad3 */
- 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad4.gpmc_ad4 */
- 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad5.gpmc_ad5 */
- 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad6.gpmc_ad6 */
- 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_ad7.gpmc_ad7 */
- 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /*
gpmc_wait0.gpmc_wait0 */
- 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /*
gpmc_wpn.gpio0_30 */
- 0x7c (PIN_OUTPUT | MUX_MODE0) /*
gpmc_csn0.gpmc_csn0 */
- 0x90 (PIN_OUTPUT | MUX_MODE0) /*
gpmc_advn_ale.gpmc_advn_ale */
- 0x94 (PIN_OUTPUT | MUX_MODE0) /*
gpmc_oen_ren.gpmc_oen_ren */
- 0x98 (PIN_OUTPUT | MUX_MODE0) /*
gpmc_wen.gpmc_wen */
- 0x9c (PIN_OUTPUT | MUX_MODE0) /*
gpmc_be0n_cle.gpmc_be0n_cle */
- >;
- };
-
- davinci_mdio_default: davinci_mdio_default {
- pinctrl-single,pins = <
- /* MDIO */
- 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)
/* mdio_data.mdio_data */
- 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)
/* mdio_clk.mdio_clk */
- >;
- };
-
- pcm051_led_pins: pinmux_pcm051_led_pins {
- pinctrl-single,pins = <
- 0x80 (MUX_MODE7)
- 0x84 (MUX_MODE7)
- >;
- };
-
- pcm051_user_pins: pinmux_pcm051_user_pins {
- pinctrl-single,pins = <
- 0x1e4 (PULL_UP |INPUT_EN |MUX_MODE7)
- 0x1e8 (PULL_UP |INPUT_EN |MUX_MODE7)
- >;
- };
-};
-
-&i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins>;
-
- status = "okay";
- clock-frequency = <400000>;
-
- eeprom: 24c32@52 {
- compatible = "atmel,24c32";
- pagesize = <32>;
- reg = <0x52>;
- };
-};
-
-&mmc1 {
- pinctrl-names = "default";
- pinctrl-0 = <&mmc1_pins>;
- status = "okay";
-};
-
-&spi0 {
- pinctrl-names = "default";
- pinctrl-0 = <&spi0_pins>;
- status = "okay";
-
- flash: m25p80 {
- compatible = "m25p80";
- spi-max-frequency = <48000000>;
- reg = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@0 {
- label = "xload";
- reg = <0x0 0x20000>;
- };
-
- partition@1 {
- label = "barebox";
- reg = <0x20000 0x80000>;
- };
-
- partition@2 {
- label = "bareboxenv";
- reg = <0xa0000 0x20000>;
- };
-
- partition@3 {
- label = "oftree";
- reg = <0xc0000 0x20000>;
- };
-
- partition@4 {
- label = "kernel";
- reg = <0xe0000 0x400000>;
- };
- };
-};
-
-&uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins>;
- status = "okay";
-};
-
-&davinci_mdio {
- pinctrl-names = "default";
- pinctrl-0 = <&davinci_mdio_default>;
- status = "okay";
-};
-
-&phy_sel {
- rmii-clock-ext;
-};
-
-&cpsw_emac0 {
- phy_id = <&davinci_mdio>, <0>;
- phy-mode = "rmii";
-};
-
-&mac {
- pinctrl-names = "default";
- pinctrl-0 = <&emac_rmii1_pins>;
- slaves = <1>;
- status = "okay";
-};
-
-&gpmc {
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&nandflash_pins_s0>;
- ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
- nand: nand@0,0 {
- reg = <0 0 0>; /* CS0, offset 0 */
- nand-bus-width = <8>;
- ti,nand-ecc-opt = "bch8";
- gpmc,device-nand = "true";
- gpmc,device-width = <1>;
- gpmc,sync-clk-ps = <0>;
- gpmc,cs-on-ns = <0>;
- gpmc,cs-rd-off-ns = <30>;
- gpmc,cs-wr-off-ns = <30>;
- gpmc,adv-on-ns = <0>;
- gpmc,adv-rd-off-ns = <30>;
- gpmc,adv-wr-off-ns = <30>;
- gpmc,we-on-ns = <0>;
- gpmc,we-off-ns = <20>;
- gpmc,oe-on-ns = <10>;
- gpmc,oe-off-ns = <30>;
- gpmc,access-ns = <30>;
- gpmc,rd-cycle-ns = <30>;
- gpmc,wr-cycle-ns = <30>;
- gpmc,wait-pin = <1>;
- gpmc,wait-on-read = "true";
- gpmc,wait-on-write = "true";
- gpmc,bus-turnaround-ns = <0>;
- gpmc,cycle2cycle-delay-ns = <50>;
- gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
- gpmc,wr-access-ns = <0>;
- gpmc,wr-data-mux-bus-ns = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
- elm_id = <&elm>;
-
- partition@0 {
- label = "xload";
- reg = <0x0 0x20000>;
- };
-
- partition@1 {
- label = "xload_backup1";
- reg = <0x20000 0x20000>;
- };
-
- partition@2 {
- label = "xload_backup2";
- reg = <0x40000 0x20000>;
- };
-
- partition@3 {
- label = "xload_backup3";
- reg = <0x60000 0x20000>;
- };
-
- partition@4 {
- label = "barebox";
- reg = <0x80000 0x80000>;
- };
-
- partition@5 {
- label = "bareboxenv";
- reg = <0x100000 0x20000>;
- };
-
- partition@6 {
- label = "oftree";
- reg = <0x120000 0x20000>;
- };
-
- partition@7 {
- label = "kernel";
- reg = <0x140000 0x800000>;
- };
-
- partition@8 {
- label = "root";
- /*
- * Size 0x0 extends partition to
- * end of nand flash.
- */
- reg = <0x940000 0x0>;
- };
- };
-};
--
1.9.1
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