Re: [PATCH v3 2/4] Firmware: provide a handler to program Altera FPGAs

2014-09-08 Thread Sascha Hauer
On Thu, Sep 04, 2014 at 03:47:15PM +0200, Steffen Trumtrar wrote: +/* + * Physical requirements: + * - three free GPIOs for the signals nCONFIG, CONFIGURE_DONE, nSTATUS + * - 32 bit per word, LSB first capable SPI master (MOSI + clock) + * + * Example how to configure this driver via device

Re: [PATCH v3 2/4] Firmware: provide a handler to program Altera FPGAs

2014-09-08 Thread Sascha Hauer
On Mon, Sep 08, 2014 at 08:03:48AM +0200, Sascha Hauer wrote: On Thu, Sep 04, 2014 at 03:47:15PM +0200, Steffen Trumtrar wrote: +/* + * Physical requirements: + * - three free GPIOs for the signals nCONFIG, CONFIGURE_DONE, nSTATUS + * - 32 bit per word, LSB first capable SPI master (MOSI

[PATCH v3 2/4] Firmware: provide a handler to program Altera FPGAs

2014-09-04 Thread Steffen Trumtrar
From: Juergen Beisert j...@pengutronix.de This handler uses a regular SPI master and a few GPIOs to program an Altera FPGA in serial mode. Signed-off-by: Juergen Beisert j...@pengutronix.de Signed-off-by: Sascha Hauer s.ha...@pengutronix.de Signed-off-by: Steffen Trumtrar