imx7d dual core boot

2020-03-26 Thread Giorgio
Hi, I'm having problems booting a linux kernel image on an imx7d. What I want is to boot in nonsecure mode and that the kernel enables the second core with the PSCI. What I see is that barebox crashes within the call to __mmu_cache_on() in the file arch/arm/cpu/sm.c: int armv7_secure_monitor_in

Re: imx7d dual core boot

2020-03-26 Thread Ahmad Fatoum
Hello, On 3/26/20 11:21 AM, Giorgio wrote: > Hi, > > I'm having problems booting a linux kernel image on an imx7d. > > What I want is to boot in nonsecure mode and that the kernel enables the > second core with the PSCI. > > What I see is that barebox crashes within the call to __mmu_cache_on()

Re: imx7d dual core boot

2020-03-27 Thread Giorgio
Hi, maybe 'crash' was not the best word to describe the effect I see; the bootloader just stops running, never returns from the call to __mmu_cache_on(), there's no debug messages or stack dumps; in this case the kernel image is not started. I think on my arch / soc __mmu_cache_on() calls some a

Re: imx7d dual core boot

2020-03-27 Thread Ahmad Fatoum
Hello, On 3/27/20 9:27 AM, Giorgio wrote: > Hi, > > maybe 'crash' was not the best word to describe the effect I see; > > the bootloader just stops running, never returns from the call > to __mmu_cache_on(), there's no debug messages or stack dumps; > in this case the kernel image is not started

Re: imx7d dual core boot

2020-03-30 Thread Giorgio
Hi Ahmad, I think I've found the problem with my imx7d: in your commit id ae0a375ba71ba9b9a70cb7eda177445fcfbf586d: ARM: cache-armv7: remove duplicate domain initialization ... you removed the two asm lines: movne r1, #-1 mcrne p15, 0, r1, c3, c0, 0 @ load

Re: imx7d dual core boot

2020-04-03 Thread Ahmad Fatoum
Hello Giorgio, On 3/30/20 4:33 PM, Giorgio wrote: > Hi Ahmad, > > I think I've found the problem with my imx7d: > in your commit id ae0a375ba71ba9b9a70cb7eda177445fcfbf586d: > > ARM: cache-armv7: remove duplicate domain initialization > ... > > you removed the two asm lines: > >

Re: imx7d dual core boot

2020-04-03 Thread Giorgio
Hi Ahmad, thank you for the detailed explanations, I'll have a look at the armv7 ref. manual for more background. I wanted just to note, the problem is specifically linked to enabling the MMU: in arch/arm/cpu/cache-armv7.S: orrne r0, r0, #1 @ MMU enabled ...

Re: imx7d dual core boot

2020-04-05 Thread Ahmad Fatoum
Hello Giorgio, On 4/3/20 3:47 PM, Giorgio wrote: > Hi Ahmad, > > thank you for the detailed explanations, I'll have a look > at the armv7 ref. manual for more background. > > I wanted just to note, the problem is specifically linked > to enabling the MMU: > > in arch/arm/cpu/cache-armv7.S: > >

Re: imx7d dual core boot

2020-04-05 Thread Ahmad Fatoum
Hi, On 4/6/20 8:16 AM, Ahmad Fatoum wrote: > [1]: Linux still hangs due to what I assume to be a psci issue, kernel log > says > "unsupported enable-method property: psci" before getting stuck durcing > SDHCI probe Turning off ARM_PSCI_CPUIDLE did the trick. Seems barebox PSCI implementati

Re: imx7d dual core boot

2020-04-06 Thread Giorgio
Hi Ahmad, I've also tried the arm_v7_defconfig + my board specific code but it does not solve the problem. The setup I'm using to build barebox just include support for my board; in my board code, under arch/arm/boards/kontron-samx7, I've nothing special, just a custom init script in the environm

Re: imx7d dual core boot

2020-04-06 Thread Ahmad Fatoum
Hello Giorgio, On 4/6/20 5:15 PM, Giorgio wrote: > Searching in the Armv7-A ref. man. here: > > https://static.docs.arm.com/ddi0406/cd/DDI0406C_d_armv7ar_arm.pdf > > at B4.1.43 (page B4 - 1554) I found that the reset value of this cp15 reg. > is UNKNOWN and I can also verify this. Moreover the r

Re: imx7d dual core boot

2020-04-07 Thread Giorgio
Hi, OK, my current fix follows also the same logic as for the values of 'vbar' and 'ttb' in armv7_secure_monitor_install(). I've also found the 'set_domain(v)' in mmu.h, don't need to write a new one. I'll send a patch for this. What do you mean with the 'other i.MX7 patches' ? I've also notice

Re: imx7d dual core boot

2020-04-07 Thread Ahmad Fatoum
Hello Giorgio, On 4/7/20 9:46 AM, Giorgio wrote: > Hi, > > OK, my current fix follows also the same logic as for the values > of 'vbar' and 'ttb' in armv7_secure_monitor_install(). I've also > found the 'set_domain(v)' in mmu.h, don't need to write a new one. > > I'll send a patch for this. Gre

Re: imx7d dual core boot

2020-04-07 Thread Giorgio
Hi, On 4/7/20 10:23 AM, Ahmad Fatoum wrote: > Hello Giorgio, > > On 4/7/20 9:46 AM, Giorgio wrote: >> Hi, >> >> OK, my current fix follows also the same logic as for the values >> of 'vbar' and 'ttb' in armv7_secure_monitor_install(). I've also >> found the 'set_domain(v)' in mmu.h, don't need to

Re: imx7d dual core boot

2020-04-07 Thread Ahmad Fatoum
Hello, On 4/7/20 2:28 PM, Giorgio wrote: >> Great. Even better than hardcoding the CLIENT_DOMAIN. >> > OK. > > To read the current value of DACR, in secure mode, we need a > get_domain(). I would add it to mmu.h, beside the set_domain(). sounds good. >>> What do you mean with the 'other i.MX7 p

Re: imx7d dual core boot

2020-04-13 Thread Giorgio
Hi Ahmad, On 4/7/20 3:43 PM, Ahmad Fatoum wrote: > Hello, > > On 4/7/20 2:28 PM, Giorgio wrote: >>> Great. Even better than hardcoding the CLIENT_DOMAIN. >>> >> OK. >> >> To read the current value of DACR, in secure mode, we need a >> get_domain(). I would add it to mmu.h, beside the set_domain()

Re: imx7d dual core boot

2020-04-14 Thread Sascha Hauer
On Tue, Apr 14, 2020 at 12:30:40AM +0200, Giorgio wrote: > Hi Ahmad, > > On 4/7/20 3:43 PM, Ahmad Fatoum wrote: > > Hello, > > > > On 4/7/20 2:28 PM, Giorgio wrote: > >>> Great. Even better than hardcoding the CLIENT_DOMAIN. > >>> > >> OK. > >> > >> To read the current value of DACR, in secure mo

Re: imx7d dual core boot

2020-04-14 Thread Giorgio
Hi Sascha, thank you for your help, your last suggestion was the last missing bit in my qspi setup. I had the following wrong parameter in my flash header file: loadaddr 0x8000 following your hint I changed it to: loadaddr 0x80001000 and now I don't need my evil hack with the branch opcode