nks.
>
> BR,
>
> marek
> On Sat, Nov 24, 2018 at 2:42 PM Gianfranco Rosso
> > wrote:
> >
> > Hello Marek,
> >
> > to be honest, I really don't remember if it was succesfull.
> > For sure I can tell you that we didn't got any
riday, November 23, 2018 at 3:57:10 PM UTC+1, marek@gmail.com wrote:
>
> Hi Gianfranco,
>
> did you succeeded with adding 1G of SDRAM to your BBB? I'm fighting with
> similar problem but different chip. Thanks.
>
> BR,
>
> marek
>
>
>
>
> Dňa pi
lp you out. I think instead of using the 'force' bit, there
> must be a better alternative, but this solution works.
> Did you start working on SPI in the PRU because the linux mcspi driver is
> very slow?
>
> Kees
>
> On Friday, November 20, 2015 at 1
t;
> I did some work on this in January. I am not sure it worked well, at least
> it did something.
> The code (so far) may help:
> https://github.com/kkwekkeboom/am335x_pru_package/blob/csk_spidriver2/pru_sw/example_apps/PRU_spidriver/PRU_spidriver.p
>
> On Wednesday, November
Hello Jason, thanks for advices.
I've done the first and I've found a bug: just after soft resetting the
module I have to rewrite register MCSPI_SYSCONFIG (to 0x0308) 'cause the
module also resets this register...
The others settings seems ok.
SPI trasmission still doesn't occours, so there must
I'm writing a SPI driver for the PRU on BBB.
Mux settings for pins is done by config-pin: P9.29, P9.30 and P9.31 are
configured as "spi" for SPI1_D0, SPI1_D1 and SPI1_SCLK, while P8.27, P8.29
and P9.28 are configured as gpio output as 3 chip select (to be manually
managed).
Chip select pin are
I've also posted this in I2C topic, the solution is there:
http://beagleboard.org/Community/Forums/?place=msg%2Fbeagleboard%2FDAXyYJOrDIc%2FDZ8WKkRWaC0J
Il giorno lunedì 13 luglio 2015 09:49:20 UTC+2, Gianfranco Rosso ha scritto:
>
> I want to manage the I2C1 module by the PRU,
main processor and (mainly) keeping tight timings.
Il giorno sabato 18 luglio 2015 23:41:22 UTC+2, Gianfranco Rosso ha scritto:
>
> I finally installed CCS6 and use USB100v2 JTAG interface (after soldering
> the header into BBB pads).
>
> It looks like as I2C1 module never goes out
rrectly access the I2C1
module by PRU?
Il giorno sabato 18 luglio 2015 23:41:22 UTC+2, Gianfranco Rosso ha scritto:
>
> I finally installed CCS6 and use USB100v2 JTAG interface (after soldering
> the header into BBB pads).
>
> It looks like as I2C1 module never goes out of res
I finally installed CCS6 and use USB100v2 JTAG interface (after soldering
the header into BBB pads).
It looks like as I2C1 module never goes out of reset status: RDONE flag
into I2C_SYSS register is always 0 even after writing I2C_EN=1 into I2C_CON
register (and also, SRST=0 into register I2C_S
I want to manage the I2C1 module by the PRU, in order to interface some I/O
expanders (MCP23017 by Microchip).
I use may own "cape" without the plug-n' play eeprom (one of the next steps
will be adding management for DCAN0 and DCAN1 so i'll need these pins
too...).
So, at present, there are just
I want to manage the I2C1 module by the PRU, in order to interface some I/O
expanders (MCP23017 by Microchip).
I use may own "cape" without the plug-n' play eeprom (one of the next steps
will be adding management for DCAN0 and DCAN1 so i'll need these pins
too...).
So, at present, there are just
You're right: there's no need to do anything in order to make the BBB see
and use the whole available memory.
It automatically detects the installed memory at boot.
Anyway, I also tryed to change the MLO file using the correct value for
CONFIG register: it seems to have no effect at all...
Many
I have a couple of BBB boards (rev. C) where the original 512MB DDR3 chip
(Micron MT41K256M16HA-125:E) was removed and replaced with a new one with
1GB capacity (Micron *MT41K512M16HA-125:E*).
The only difference between the chips are the number of row address lines
(15 for 512MB chip, 16 for 1G
I have a couple of BBB boards (rev. C) where the original 512MB DDR3 chip
(Micron MT41K256M16HA-125:E) was removed and *replaced with a new one with
1GB capacity (Micron MT41K512M16HA-125:E)*.
The only difference between the chips are the number of row address lines
(15 for 512MB chip, 16 for 1G
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