Hello, The current 3.8 rcn linux-dev is missing the devicetree spec for this cape (http://elinux.org/Beagleboard:BeagleBone_DVI-D_with_Audio). This cape is based on the DVI-D rev A2 cape (http://elinux.org/CircuitCo/BeagleBone_DVI-D) combined with the audio rev A cape (http://elinux.org/CircuitCo:Audio_Cape_RevA). Typically, capemgr says at boot:
bone-capemgr bone_capemgr.8: slot #0: Requesting firmware 'BB-BONE-DVID-02-00A1.dtbo' for board-name 'BeagleBone DVI-D WITH AUDIO CAPE', version '00A1' bone-capemgr bone_capemgr.8: failed to load firmware 'BB-BONE-DVID-02-00A1.dtbo' The attached patch creates a new dts for this particular cape. It was tested as working for both DVI and audio out (ffmpeg -i file.mp3 -f alsa "default:EVM" -re -vol 50). However the HDMI cable has to be plugged in before the kernel boots, otherwise it says it defaults to 1024x768 (instead of the max resolution 1680x1050) and nothing is displayed. Does anyone have this problem with the DVI cape (with or without audio) has well? Also, is there a proper way to select the resolution? Typically, I'm looking to set 1280x720@60 at boot. TILCDC_DEFAULT_MAX_BANDWIDTH in drivers/gpu/drm/tilcdc/tilcdc_drv.h seems to be the only way to force the resolution (also see https://github.com/beagleboard/meta-beagleboard/blob/master/common-bsp/recipes-kernel/linux/linux-mainline-3.8/hdmi/0009-tilcdc-1280x1024x60-bw-1920x1080x24-bw.patch) -- For more options, visit http://beagleboard.org/discuss --- You received this message because you are subscribed to the Google Groups "BeagleBoard" group. To unsubscribe from this group and stop receiving emails from it, send an email to beagleboard+unsubscr...@googlegroups.com. For more options, visit https://groups.google.com/groups/opt_out.
--- /dev/null 2014-02-09 11:19:55.356318317 +0100 +++ KERNEL/firmware/capes/BB-BONE-DVID-02-00A1.dts 2014-02-09 13:25:03.181629696 +0100 @@ -0,0 +1,205 @@ +/* + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; +/plugin/; + +/ { + compatible = "ti,beaglebone"; + + /* identification */ + part-number = "BB-BONE-DVID-02"; + version = "00A1"; + + /* state the resources this cape uses */ + exclusive-use = + /* the pin header uses */ + "P9.14", /* led: gpio1_18 */ + "P9.16", /* led: gpio1_19 */ + "P9.31", /* mcasp0: mcasp0_aclkx */ + "P9.29", /* mcasp0: mcasp0_fsx */ + "P9.28", /* mcasp0: mcasp0_axr2 */ + "P9.25", /* mcasp0: mcasp0_ahclkx */ + "P8.4", /* lcd: gpio1_7 */ + "P8.45", /* lcd: lcd_data0 */ + "P8.46", /* lcd: lcd_data1 */ + "P8.43", /* lcd: lcd_data2 */ + "P8.44", /* lcd: lcd_data3 */ + "P8.41", /* lcd: lcd_data4 */ + "P8.42", /* lcd: lcd_data5 */ + "P8.39", /* lcd: lcd_data6 */ + "P8.40", /* lcd: lcd_data7 */ + "P8.37", /* lcd: lcd_data8 */ + "P8.38", /* lcd: lcd_data9 */ + "P8.36", /* lcd: lcd_data10 */ + "P8.34", /* lcd: lcd_data11 */ + "P8.35", /* lcd: lcd_data12 */ + "P8.33", /* lcd: lcd_data13 */ + "P8.31", /* lcd: lcd_data14 */ + "P8.32", /* lcd: lcd_data15 */ + "P8.27", /* lcd: lcd_vsync */ + "P8.29", /* lcd: lcd_hsync */ + "P8.28", /* lcd: lcd_pclk */ + "P8.30", /* lcd: lcd_ac_bias_en */ + /* the hardware IP uses */ + "gpio1_18", + "gpio1_19", + "mcasp0", + "gpio1_7", + "lcd"; + + fragment@0 { + target = <&am33xx_pinmux>; + __overlay__ { + + bone_dvid_audio_cape_led_pins: pinmux_bone_dvid_audio_cape_led_pins { + pinctrl-single,pins = < + 0x48 0x07 /* gpmc_a2.gpio1_18, OUTPUT | MODE7 */ + 0x4c 0x07 /* gpmc_a3.gpio1_19, OUTPUT | MODE7 */ + >; + }; + + bone_dvid_audio_cape_audio_pins: pinmux_bone_dvid_audio_cape_audio_pins { + pinctrl-single,pins = < + 0x190 0x20 /* mcasp0_aclkx.mcasp0_aclkx, INPUT | MODE0 */ + 0x194 0x20 /* mcasp0_fsx.mcasp0_fsx, INPUT | MODE0 */ + 0x19c 0x22 /* mcasp0_ahclkr.mcasp0_axr2, INPUT | MODE2 */ + 0x1ac 0x22 /* mcasp0_ahclkx.mcasp0_axr3, INPUT | MODE2 */ + >; + }; + + bone_dvid_audio_cape_dvi_00A2_pins: pinmux_bone_dvid_audio_cape_dvi_00A2_pins { + pinctrl-single,pins = < + 0x1c 0x07 /* gpmc_ad7.gpio1_7, OUTPUT | MODE7 - DVIPDn */ + + 0xa0 0x08 /* lcd_data0.lcd_data0, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xa4 0x08 /* lcd_data1.lcd_data1, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xa8 0x08 /* lcd_data2.lcd_data2, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xac 0x08 /* lcd_data3.lcd_data3, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xb0 0x08 /* lcd_data4.lcd_data4, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xb4 0x08 /* lcd_data5.lcd_data5, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xb8 0x08 /* lcd_data6.lcd_data6, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xbc 0x08 /* lcd_data7.lcd_data7, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xc0 0x08 /* lcd_data8.lcd_data8, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xc4 0x08 /* lcd_data9.lcd_data9, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xc8 0x08 /* lcd_data10.lcd_data10, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xcc 0x08 /* lcd_data11.lcd_data11, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xd0 0x08 /* lcd_data12.lcd_data12, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xd4 0x08 /* lcd_data13.lcd_data13, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xd8 0x08 /* lcd_data14.lcd_data14, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xdc 0x08 /* lcd_data15.lcd_data15, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT | AM33XX_PULL_DISA */ + 0xe0 0x00 /* lcd_vsync.lcd_vsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ + 0xe4 0x00 /* lcd_hsync.lcd_hsync, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ + 0xe8 0x00 /* lcd_pclk.lcd_pclk, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ + 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT */ + >; + }; + }; + }; + + fragment@1 { + target = <&ocp>; + __overlay__ { + + /* avoid stupid warning */ + #address-cells = <1>; + #size-cells = <1>; + + gpio-leds-cape-dvid-audio { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&bone_dvid_audio_cape_led_pins>; + + dvi-led0 { + label = "dvi:green:usr0"; + gpios = <&gpio2 18 0>; + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + + dvi-led1 { + label = "dvi:green:usr1"; + gpios = <&gpio2 19 0>; + linux,default-trigger = "mmc0"; + default-state = "off"; + }; + }; + + /* use the DVI panel now */ + panel { + compatible = "tilcdc,tfp410"; + pinctrl-names = "default"; + pinctrl-0 = <&bone_dvid_audio_cape_dvi_00A2_pins>; + ti,power-gpio = <&gpio1 31 0x0>; + i2c = <&i2c2>; + }; + + fb { + compatible = "ti,am33xx-tilcdc"; + reg = <0x4830e000 0x1000>; + interrupt-parent = <&intc>; + interrupts = <36>; + ti,hwmods = "lcdc"; + }; + }; + }; + + fragment@2 { + target = <&i2c2>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + tlv320aic3x: tlv320aic3x@1b { + compatible = "ti,tlv320aic3x"; + reg = <0x1b>; + status = "okay"; + }; + }; + }; + + fragment@3 { + target = <&mcasp0>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&bone_dvid_audio_cape_audio_pins>; + + status = "okay"; + + op-mode = <0>; /* MCASP_IIS_MODE */ + tdm-slots = <2>; + num-serializer = <16>; + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ + 0 0 2 1 + 0 0 0 0 + 0 0 0 0 + 0 0 0 0 + >; + tx-num-evt = <1>; + rx-num-evt = <1>; + }; + }; + + fragment@4 { + target = <&ocp>; + __overlay__ { + sound { + compatible = "ti,da830-evm-audio"; + ti,model = "DA830 EVM"; + ti,audio-codec = <&tlv320aic3x>; + ti,mcasp-controller = <&mcasp0>; + ti,codec-clock-rate = <12000000>; + ti,audio-routing = + "Headphone Jack", "HPLOUT", + "Headphone Jack", "HPROUT", + "LINE1L", "Line In", + "LINE1R", "Line In"; + }; + }; + + }; +}; diff --git a/firmware/Makefile b/firmware/Makefile index 56b0b50..f9a4426 100644 --- a/firmware/Makefile +++ b/firmware/Makefile @@ -150,6 +150,7 @@ fw-shipped-$(CONFIG_CAPE_BEAGLEBONE) += \ cape-bone-lcd3-00A0.dtbo \ cape-bone-lcd3-00A2.dtbo \ BB-BONE-AUDI-01-00A0.dtbo \ + BB-BONE-DVID-02-00A1.dtbo \ BB-BONE-LCD4-01-00A0.dtbo \ BB-BONE-LCD4-01-00A1.dtbo \ BB-BONE-LCD7-01-00A2.dtbo \
